KR100734528B1 - 2개 클록 도메인들 간의 직렬 데이터 전송을 개시하는시스템 및 방법 - Google Patents
2개 클록 도메인들 간의 직렬 데이터 전송을 개시하는시스템 및 방법 Download PDFInfo
- Publication number
- KR100734528B1 KR100734528B1 KR1020027002343A KR20027002343A KR100734528B1 KR 100734528 B1 KR100734528 B1 KR 100734528B1 KR 1020027002343 A KR1020027002343 A KR 1020027002343A KR 20027002343 A KR20027002343 A KR 20027002343A KR 100734528 B1 KR100734528 B1 KR 100734528B1
- Authority
- KR
- South Korea
- Prior art keywords
- clock
- rate
- bit
- register
- response
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
- G06F13/4059—Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Information Transfer Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Power Sources (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/386,650 US6393502B1 (en) | 1999-08-31 | 1999-08-31 | System and method for initiating a serial data transfer between two clock domains |
| US09/386,650 | 1999-08-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20020064277A KR20020064277A (ko) | 2002-08-07 |
| KR100734528B1 true KR100734528B1 (ko) | 2007-07-03 |
Family
ID=23526484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020027002343A Expired - Fee Related KR100734528B1 (ko) | 1999-08-31 | 2000-03-23 | 2개 클록 도메인들 간의 직렬 데이터 전송을 개시하는시스템 및 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | US6393502B1 (https=) |
| EP (1) | EP1214662B1 (https=) |
| JP (1) | JP4630512B2 (https=) |
| KR (1) | KR100734528B1 (https=) |
| DE (1) | DE60002589T2 (https=) |
| WO (1) | WO2001016773A1 (https=) |
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| JP4091195B2 (ja) * | 1999-02-08 | 2008-05-28 | 富士通株式会社 | インタフェース制御装置及びインタフェース制御方法 |
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| KR100369768B1 (ko) | 2000-12-09 | 2003-03-03 | 엘지전자 주식회사 | 휴대용 컴퓨터에서의 버스 클럭 주파수 제어장치 |
| US6715094B2 (en) * | 2000-12-20 | 2004-03-30 | Intel Corporation | Mult-mode I/O interface for synchronizing selected control patterns into control clock domain to obtain interface control signals to be transmitted to I/O buffers |
| US8095370B2 (en) | 2001-02-16 | 2012-01-10 | Agiletv Corporation | Dual compression voice recordation non-repudiation system |
| US6952174B2 (en) * | 2001-09-07 | 2005-10-04 | Microsemi Corporation | Serial data interface |
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| JP4159415B2 (ja) | 2002-08-23 | 2008-10-01 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
| JP2004112182A (ja) * | 2002-09-17 | 2004-04-08 | Fuji Xerox Co Ltd | 通信端末装置及びその制御方法 |
| US7324589B2 (en) * | 2003-02-05 | 2008-01-29 | Fujitsu Limited | Method and system for providing error compensation to a signal using feedback control |
| US7313210B2 (en) * | 2003-02-28 | 2007-12-25 | Hewlett-Packard Development Company, L.P. | System and method for establishing a known timing relationship between two clock signals |
| US20040193931A1 (en) * | 2003-03-26 | 2004-09-30 | Akkerman Ryan L. | System and method for transferring data from a first clock domain to a second clock domain |
| US7275171B2 (en) * | 2003-05-22 | 2007-09-25 | Rambus Inc. | Method and apparatus for programmable sampling clock edge selection |
| EP1515271A1 (en) * | 2003-09-09 | 2005-03-16 | STMicroelectronics S.r.l. | Method and device for extracting a subset of data from a set of data |
| US7657689B1 (en) * | 2003-10-07 | 2010-02-02 | Altera Corporation | Methods and apparatus for handling reset events in a bus bridge |
| FR2870368B1 (fr) * | 2004-01-27 | 2006-12-15 | Atmel Corp | Procede et dispositif pour piloter de multiples peripheriques avec des frequences d'horloge differentes dans un circuit integre |
| US20060023819A1 (en) * | 2004-07-29 | 2006-02-02 | Adkisson Richard W | Clock synchronizer |
| US7436917B2 (en) * | 2004-07-29 | 2008-10-14 | Hewlett-Packard Development Company, L.P. | Controller for clock synchronizer |
| US8660647B2 (en) * | 2005-07-28 | 2014-02-25 | Cyberonics, Inc. | Stimulating cranial nerve to treat pulmonary disorder |
| US7614737B2 (en) * | 2005-12-16 | 2009-11-10 | Lexmark International Inc. | Method for identifying an installed cartridge |
| KR20070114557A (ko) * | 2006-05-29 | 2007-12-04 | 삼성전자주식회사 | 퓨즈를 갖는 반도체 기억 소자 및 그 형성 방법 |
| US7760798B2 (en) * | 2006-05-30 | 2010-07-20 | Fujitsu Limited | System and method for adjusting compensation applied to a signal |
| US7839958B2 (en) | 2006-05-30 | 2010-11-23 | Fujitsu Limited | System and method for the adjustment of compensation applied to a signal |
| US7817757B2 (en) * | 2006-05-30 | 2010-10-19 | Fujitsu Limited | System and method for independently adjusting multiple offset compensations applied to a signal |
| US7804921B2 (en) | 2006-05-30 | 2010-09-28 | Fujitsu Limited | System and method for decoupling multiple control loops |
| US7848470B2 (en) * | 2006-05-30 | 2010-12-07 | Fujitsu Limited | System and method for asymmetrically adjusting compensation applied to a signal |
| US7839955B2 (en) * | 2006-05-30 | 2010-11-23 | Fujitsu Limited | System and method for the non-linear adjustment of compensation applied to a signal |
| US7764757B2 (en) * | 2006-05-30 | 2010-07-27 | Fujitsu Limited | System and method for the adjustment of offset compensation applied to a signal |
| US7817712B2 (en) * | 2006-05-30 | 2010-10-19 | Fujitsu Limited | System and method for independently adjusting multiple compensations applied to a signal |
| US7804894B2 (en) | 2006-05-30 | 2010-09-28 | Fujitsu Limited | System and method for the adjustment of compensation applied to a signal using filter patterns |
| US7787534B2 (en) * | 2006-05-30 | 2010-08-31 | Fujitsu Limited | System and method for adjusting offset compensation applied to a signal |
| US7801208B2 (en) * | 2006-05-30 | 2010-09-21 | Fujitsu Limited | System and method for adjusting compensation applied to a signal using filter patterns |
| CN101617371B (zh) * | 2007-02-16 | 2014-03-26 | 莫塞德技术公司 | 具有多个外部电源的非易失性半导体存储器 |
| US7466247B1 (en) | 2007-10-04 | 2008-12-16 | Lecroy Corporation | Fractional-decimation signal processing |
| US8781053B2 (en) * | 2007-12-14 | 2014-07-15 | Conversant Intellectual Property Management Incorporated | Clock reproducing and timing method in a system having a plurality of devices |
| US8467486B2 (en) * | 2007-12-14 | 2013-06-18 | Mosaid Technologies Incorporated | Memory controller with flexible data alignment to clock |
| US9197981B2 (en) * | 2011-04-08 | 2015-11-24 | The Regents Of The University Of Michigan | Coordination amongst heterogeneous wireless devices |
| US9858322B2 (en) | 2013-11-11 | 2018-01-02 | Amazon Technologies, Inc. | Data stream ingestion and persistence techniques |
| FR3029661B1 (fr) * | 2014-12-04 | 2016-12-09 | Stmicroelectronics Rousset | Procedes de transmission et de reception d'un signal binaire sur un lien serie, en particulier pour la detection de la vitesse de transmission, et dispositifs correspondants |
| US9825730B1 (en) * | 2016-09-26 | 2017-11-21 | Dell Products, Lp | System and method for optimizing link performance with lanes operating at different speeds |
| DE102019112447A1 (de) * | 2019-05-13 | 2020-11-19 | Jenoptik Optical Systems Gmbh | Verfahren und Auswerteeinheit zur Ermittlung eines Zeitpunkts einer Flanke in einem Signal |
| US11860685B2 (en) | 2021-10-29 | 2024-01-02 | Advanced Micro Devices, Inc. | Clock frequency divider circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5623522A (en) * | 1994-11-21 | 1997-04-22 | Yamaha Corporation | Asynchronous serial data receiving device |
| US5909563A (en) * | 1996-09-25 | 1999-06-01 | Philips Electronics North America Corporation | Computer system including an interface for transferring data between two clock domains |
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| US3725793A (en) | 1971-12-15 | 1973-04-03 | Bell Telephone Labor Inc | Clock synchronization arrangement employing delay devices |
| JPS5911056A (ja) * | 1982-07-09 | 1984-01-20 | Nec Corp | 調歩同期式通信方式 |
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| KR900001817B1 (ko) | 1987-08-01 | 1990-03-24 | 삼성전자 주식회사 | 저항 수단을 이용한 씨 모스 티티엘 인푸트 버퍼 |
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-
1999
- 1999-08-31 US US09/386,650 patent/US6393502B1/en not_active Expired - Lifetime
- 1999-10-27 US US09/428,633 patent/US6505261B1/en not_active Expired - Lifetime
-
2000
- 2000-03-23 EP EP00919559A patent/EP1214662B1/en not_active Expired - Lifetime
- 2000-03-23 KR KR1020027002343A patent/KR100734528B1/ko not_active Expired - Fee Related
- 2000-03-23 DE DE60002589T patent/DE60002589T2/de not_active Expired - Lifetime
- 2000-03-23 WO PCT/US2000/007695 patent/WO2001016773A1/en not_active Ceased
- 2000-03-23 JP JP2001520658A patent/JP4630512B2/ja not_active Expired - Fee Related
-
2002
- 2002-03-11 US US10/095,019 patent/US6668292B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5623522A (en) * | 1994-11-21 | 1997-04-22 | Yamaha Corporation | Asynchronous serial data receiving device |
| US5909563A (en) * | 1996-09-25 | 1999-06-01 | Philips Electronics North America Corporation | Computer system including an interface for transferring data between two clock domains |
Also Published As
| Publication number | Publication date |
|---|---|
| US6505261B1 (en) | 2003-01-07 |
| EP1214662B1 (en) | 2003-05-07 |
| KR20020064277A (ko) | 2002-08-07 |
| DE60002589T2 (de) | 2004-03-25 |
| WO2001016773A1 (en) | 2001-03-08 |
| EP1214662A1 (en) | 2002-06-19 |
| JP4630512B2 (ja) | 2011-02-09 |
| DE60002589D1 (de) | 2003-06-12 |
| US6393502B1 (en) | 2002-05-21 |
| US6668292B2 (en) | 2003-12-23 |
| US20020090046A1 (en) | 2002-07-11 |
| JP2003508956A (ja) | 2003-03-04 |
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