KR100734528B1 - 2개 클록 도메인들 간의 직렬 데이터 전송을 개시하는시스템 및 방법 - Google Patents

2개 클록 도메인들 간의 직렬 데이터 전송을 개시하는시스템 및 방법 Download PDF

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KR100734528B1
KR100734528B1 KR1020027002343A KR20027002343A KR100734528B1 KR 100734528 B1 KR100734528 B1 KR 100734528B1 KR 1020027002343 A KR1020027002343 A KR 1020027002343A KR 20027002343 A KR20027002343 A KR 20027002343A KR 100734528 B1 KR100734528 B1 KR 100734528B1
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clock
rate
bit
register
response
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KR20020064277A (ko
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마이어데릭알.
매드리드필립에스.
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
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Assigned to 글로벌파운드리즈 인크. reassignment 글로벌파운드리즈 인크. 권리의 전부이전등록 Assignors: 어드밴스드 마이크로 디바이시즈, 인코포레이티드
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4059Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Power Sources (AREA)
KR1020027002343A 1999-08-31 2000-03-23 2개 클록 도메인들 간의 직렬 데이터 전송을 개시하는시스템 및 방법 Expired - Fee Related KR100734528B1 (ko)

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Application Number Priority Date Filing Date Title
US09/386,650 US6393502B1 (en) 1999-08-31 1999-08-31 System and method for initiating a serial data transfer between two clock domains
US09/386,650 1999-08-31

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KR20020064277A KR20020064277A (ko) 2002-08-07
KR100734528B1 true KR100734528B1 (ko) 2007-07-03

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US (3) US6393502B1 (https=)
EP (1) EP1214662B1 (https=)
JP (1) JP4630512B2 (https=)
KR (1) KR100734528B1 (https=)
DE (1) DE60002589T2 (https=)
WO (1) WO2001016773A1 (https=)

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US6505261B1 (en) 2003-01-07
EP1214662B1 (en) 2003-05-07
KR20020064277A (ko) 2002-08-07
DE60002589T2 (de) 2004-03-25
WO2001016773A1 (en) 2001-03-08
EP1214662A1 (en) 2002-06-19
JP4630512B2 (ja) 2011-02-09
DE60002589D1 (de) 2003-06-12
US6393502B1 (en) 2002-05-21
US6668292B2 (en) 2003-12-23
US20020090046A1 (en) 2002-07-11
JP2003508956A (ja) 2003-03-04

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