KR100692467B1 - 층 형성 방법, 배선 기판, 전기 광학 장치, 및 전자 기기 - Google Patents
층 형성 방법, 배선 기판, 전기 광학 장치, 및 전자 기기 Download PDFInfo
- Publication number
- KR100692467B1 KR100692467B1 KR1020050051282A KR20050051282A KR100692467B1 KR 100692467 B1 KR100692467 B1 KR 100692467B1 KR 1020050051282 A KR1020050051282 A KR 1020050051282A KR 20050051282 A KR20050051282 A KR 20050051282A KR 100692467 B1 KR100692467 B1 KR 100692467B1
- Authority
- KR
- South Korea
- Prior art keywords
- layer
- insulating material
- insulating
- conductive
- discharged
- Prior art date
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1241—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing
- H05K3/125—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by ink-jet printing or drawing by dispensing by ink-jet printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Application Of Or Painting With Fluid Materials (AREA)
- Electrodes Of Semiconductors (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
Description
Claims (11)
- 잉크젯법을 사용한 층 형성 방법으로서,(a)제1 레벨의 표면상에 위치하는 제1 도전층의 측면이 제1 절연 재료로 덮히도록, 상기 표면상에 제1 농도를 갖는 액상의 상기 제1 절연 재료를 토출하는 스텝;(b)토출된 상기 제1 절연 재료를 활성화 또는 건조하여, 상기 제1 도전층에 접하는 제1 절연층을 형성하는 스텝;(c)상기 제1 도전층상과 상기 제1 절연층상에, 상기 제1 농도보다도 높은 제2 농도를 갖는 액상의 제2 절연 재료를 토출하는 스텝; 및(d)토출된 상기 제2 절연 재료를 활성화 또는 건조하여, 상기 제1 도전층과 상기 제1 절연층을 덮는 제2 절연층을 형성하는 스텝;을 포함하고,상기 스텝(c)은 상기 토출된 제2 절연 재료에 의해서 상기 제1 도전층의 일부를 노출하는 콘택트홀의 형상이 취해지도록, 상기 제2 절연 재료를 토출하는 스텝을 포함하며,상기 스텝(d)은 상기 토출된 제2 절연 재료를 활성화 또는 건조하여, 상기 콘택트홀을 가진 상기 제2 절연층을 얻는 스텝을 포함하는 층 형성 방법.
- 제1항에 있어서,상기 제1 도전층은 동(銅) 배선인 층 형성 방법.
- 제1항에 있어서,(e)상기 표면상에 액상의 제1 도전성 재료를 토출하는 스텝과,(f)토출된 상기 제1 도전성 재료층을 활성화 또는 건조하여, 상기 제1 도전 층을 얻는 스텝을 더 포함한 층 형성 방법.
- 제3항에 있어서,상기 스텝(e)은 은을 함유한 상기 제1 도전성 재료를 토출하는 스텝을 포함하는 층 형성 방법.
- 삭제
- 제1항에 있어서,(g)상기 콘택트홀내에 상기 제1 도전층에 접하는 제2 도전층을 마련하는 스텝을 더 포함한 층 형성 방법.
- 제6항에 있어서,상기 스텝(g)은 상기 콘택트홀에 액상의 제2 도전성 재료를 토출하는 스텝 과, 상기 토출된 제2 도전성 재료를 활성화 또는 건조하여 상기 제2 도전층을 얻는 스텝을 포함하고 있는 층 형성 방법.
- 제1 부분과 상기 제1 부분에 접하는 제2 부분을 덮는 층을 잉크젯법으로 형성하는 층 형성 방법으로서,(a)상기 제1 부분에 제2 농도를 가진 액상의 제2 절연 재료를 토출하는 스텝; 및(b)상기 스텝(a) 후에, 상기 제2 부분에 제1 농도를 가진 액상의 제1 절연 재료를 토출하는 스텝;을 포함하며,상기 스텝(a)은 상기 토출된 제2 절연 재료에 의해서 콘택트홀의 형상이 취해지도록, 상기 제2 절연 재료를 토출하는 스텝을 포함하고,상기 제1 부분과 제2부분이 동일 레벨의 표면상에 위치하는 층 형성 방법.
- 삭제
- 삭제
- 삭제
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP-P-2004-00207177 | 2004-07-14 | ||
JP2004207177A JP4207860B2 (ja) | 2004-07-14 | 2004-07-14 | 層形成方法、配線基板、電気光学装置、および電子機器 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20060048369A KR20060048369A (ko) | 2006-05-18 |
KR100692467B1 true KR100692467B1 (ko) | 2007-03-09 |
Family
ID=35599770
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020050051282A KR100692467B1 (ko) | 2004-07-14 | 2005-06-15 | 층 형성 방법, 배선 기판, 전기 광학 장치, 및 전자 기기 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20060013970A1 (ko) |
JP (1) | JP4207860B2 (ko) |
KR (1) | KR100692467B1 (ko) |
CN (1) | CN100521880C (ko) |
TW (1) | TW200611613A (ko) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4207860B2 (ja) | 2004-07-14 | 2009-01-14 | セイコーエプソン株式会社 | 層形成方法、配線基板、電気光学装置、および電子機器 |
JP4042737B2 (ja) * | 2004-10-27 | 2008-02-06 | セイコーエプソン株式会社 | パターン形成システム |
US7867561B2 (en) * | 2005-06-22 | 2011-01-11 | Canon Kabushiki Kaisha | Circuit pattern forming method and circuit pattern forming device |
TWI277373B (en) * | 2005-09-16 | 2007-03-21 | Foxconn Advanced Tech Inc | Method of continuous producing flexible printed circuit board |
JP2007281416A (ja) * | 2006-03-17 | 2007-10-25 | Seiko Epson Corp | 金属配線形成方法及びアクティブマトリクス基板の製造方法 |
JP5574780B2 (ja) * | 2010-03-30 | 2014-08-20 | 株式会社テラプローブ | 半導体装置及びその製造方法 |
JP5516069B2 (ja) * | 2010-05-25 | 2014-06-11 | 大日本印刷株式会社 | 部品内蔵配線板、部品内蔵配線板の製造方法 |
WO2012117046A1 (de) * | 2011-03-01 | 2012-09-07 | Printechnologics Gmbh | Eingabeelement zur bedienung eines berührungsbildschirms |
US20140010952A1 (en) * | 2012-01-02 | 2014-01-09 | Noam ROSENSTEIN | Pcb repair of defective interconnects by deposition of conductive ink |
US9425571B2 (en) * | 2012-01-06 | 2016-08-23 | Johnson & Johnson Vision Care, Inc. | Methods and apparatus to form electrical interconnects on ophthalmic devices |
KR101484771B1 (ko) * | 2013-07-31 | 2015-01-22 | 한국과학기술원 | 은 나노와이어를 이용한 전극소자 및 그 제조 방법 |
EP3123843B1 (en) | 2014-03-25 | 2021-06-09 | Stratasys Ltd. | Method for fabricating cross-layer pattern |
JP6248749B2 (ja) * | 2014-03-28 | 2017-12-20 | 富士通株式会社 | 多層配線構造の形成方法及び配線基板 |
JP6435638B2 (ja) * | 2014-05-16 | 2018-12-12 | 株式会社リコー | インクジェット記録装置、インクジェット記録方法及びプログラム |
JP6441954B2 (ja) * | 2014-11-07 | 2018-12-19 | 株式会社Fuji | 配線形成方法 |
US11191167B2 (en) | 2015-03-25 | 2021-11-30 | Stratasys Ltd. | Method and system for in situ sintering of conductive ink |
JP6554541B2 (ja) * | 2015-07-13 | 2019-07-31 | 株式会社Fuji | 配線形成方法および配線形成装置 |
Citations (5)
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JP2003243327A (ja) | 2002-02-20 | 2003-08-29 | Seiko Epson Corp | 電子デバイス、配線形成方法および配線形成装置 |
US20040016115A1 (en) | 2002-04-22 | 2004-01-29 | Takashi Hashimoto | Method of manufacturing a device, device, non-contact type card medium, and electronic equipment |
KR20040044342A (ko) * | 2002-11-19 | 2004-05-28 | 세이코 엡슨 가부시키가이샤 | 다층 회로 기판, 그 제조 방법, 전자 디바이스 및 전자 기기 |
JP2004200563A (ja) | 2002-12-20 | 2004-07-15 | Nippon Zeon Co Ltd | プリント配線板の製造方法 |
US20060013970A1 (en) | 2004-07-14 | 2006-01-19 | Seiko Epson Corporation | Method for providing a layer, wiring substrate, elector-optical device, and electronic equipment |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2394881A1 (en) * | 1999-12-21 | 2001-06-28 | Plastic Logic Limited | Solution processed devices |
US6603141B2 (en) * | 2001-12-28 | 2003-08-05 | Motorola, Inc. | Organic semiconductor and method |
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2004
- 2004-07-14 JP JP2004207177A patent/JP4207860B2/ja not_active Expired - Lifetime
-
2005
- 2005-06-07 US US11/146,136 patent/US20060013970A1/en not_active Abandoned
- 2005-06-15 KR KR1020050051282A patent/KR100692467B1/ko active IP Right Grant
- 2005-07-05 TW TW094122734A patent/TW200611613A/zh unknown
- 2005-07-14 CN CNB2005100846800A patent/CN100521880C/zh active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003243327A (ja) | 2002-02-20 | 2003-08-29 | Seiko Epson Corp | 電子デバイス、配線形成方法および配線形成装置 |
US20040016115A1 (en) | 2002-04-22 | 2004-01-29 | Takashi Hashimoto | Method of manufacturing a device, device, non-contact type card medium, and electronic equipment |
KR20040044342A (ko) * | 2002-11-19 | 2004-05-28 | 세이코 엡슨 가부시키가이샤 | 다층 회로 기판, 그 제조 방법, 전자 디바이스 및 전자 기기 |
JP2004200563A (ja) | 2002-12-20 | 2004-07-15 | Nippon Zeon Co Ltd | プリント配線板の製造方法 |
US20060013970A1 (en) | 2004-07-14 | 2006-01-19 | Seiko Epson Corporation | Method for providing a layer, wiring substrate, elector-optical device, and electronic equipment |
Also Published As
Publication number | Publication date |
---|---|
TW200611613A (en) | 2006-04-01 |
JP4207860B2 (ja) | 2009-01-14 |
CN100521880C (zh) | 2009-07-29 |
JP2006032535A (ja) | 2006-02-02 |
CN1722941A (zh) | 2006-01-18 |
KR20060048369A (ko) | 2006-05-18 |
US20060013970A1 (en) | 2006-01-19 |
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