KR100593752B1 - 불순물들이 제거된 실리콘 질화막을 구비하는 반도체소자의 제조방법 - Google Patents

불순물들이 제거된 실리콘 질화막을 구비하는 반도체소자의 제조방법 Download PDF

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KR100593752B1
KR100593752B1 KR1020050004733A KR20050004733A KR100593752B1 KR 100593752 B1 KR100593752 B1 KR 100593752B1 KR 1020050004733 A KR1020050004733 A KR 1020050004733A KR 20050004733 A KR20050004733 A KR 20050004733A KR 100593752 B1 KR100593752 B1 KR 100593752B1
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nitride film
silicon nitride
semiconductor substrate
forming
gate pattern
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English (en)
Korean (ko)
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김경민
박상규
김상운
김재환
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삼성전자주식회사
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Priority to US11/281,177 priority patent/US7416997B2/en
Priority to JP2006008978A priority patent/JP4795028B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
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    • A61K9/7023—Transdermal patches and similar drug-containing composite devices, e.g. cataplasms
    • A61K9/703—Transdermal patches and similar drug-containing composite devices, e.g. cataplasms characterised by shape or structure; Details concerning release liner or backing; Refillable patches; User-activated patches
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • A—HUMAN NECESSITIES
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    • A61F2013/00361—Plasters
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
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  • General Health & Medical Sciences (AREA)
  • Public Health (AREA)
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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020050004733A 2005-01-18 2005-01-18 불순물들이 제거된 실리콘 질화막을 구비하는 반도체소자의 제조방법 Expired - Fee Related KR100593752B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020050004733A KR100593752B1 (ko) 2005-01-18 2005-01-18 불순물들이 제거된 실리콘 질화막을 구비하는 반도체소자의 제조방법
US11/281,177 US7416997B2 (en) 2005-01-18 2005-11-17 Method of fabricating semiconductor device including removing impurities from silicon nitride layer
JP2006008978A JP4795028B2 (ja) 2005-01-18 2006-01-17 不純物が除去されたシリコン窒化膜を備える半導体素子の製造方法

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Application Number Priority Date Filing Date Title
KR1020050004733A KR100593752B1 (ko) 2005-01-18 2005-01-18 불순물들이 제거된 실리콘 질화막을 구비하는 반도체소자의 제조방법

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KR100593752B1 true KR100593752B1 (ko) 2006-06-28

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US (1) US7416997B2 (enExample)
JP (1) JP4795028B2 (enExample)
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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008057581A1 (en) 2006-11-08 2008-05-15 Playtex Products, Inc. Tampon pledget for increased bypass leakage protection
US10242866B2 (en) * 2017-03-08 2019-03-26 Lam Research Corporation Selective deposition of silicon nitride on silicon oxide using catalytic control

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040001488A (ko) * 2002-06-28 2004-01-07 주식회사 하이닉스반도체 캐패시터 형성 방법
KR20040060416A (ko) * 2002-12-30 2004-07-06 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법

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Publication number Priority date Publication date Assignee Title
JPH10303141A (ja) * 1997-04-28 1998-11-13 Sony Corp 半導体装置及びその製造方法
US5874368A (en) 1997-10-02 1999-02-23 Air Products And Chemicals, Inc. Silicon nitride from bis(tertiarybutylamino)silane
JP2001156065A (ja) * 1999-11-24 2001-06-08 Hitachi Kokusai Electric Inc 半導体装置の製造方法および半導体製造装置
US6515350B1 (en) 2000-02-22 2003-02-04 Micron Technology, Inc. Protective conformal silicon nitride films and spacers
JP4849711B2 (ja) * 2000-10-31 2012-01-11 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
JP4257055B2 (ja) * 2001-11-15 2009-04-22 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2004266158A (ja) 2003-03-03 2004-09-24 Applied Materials Inc シリコン窒化膜、その形成方法及び装置、並びに半導体素子
JP3756894B2 (ja) * 2003-06-13 2006-03-15 株式会社東芝 窒化膜の膜質改善方法、及び半導体装置の製造方法
US20050059260A1 (en) * 2003-09-15 2005-03-17 Haowen Bu CMOS transistors and methods of forming same
JP2006186210A (ja) * 2004-12-28 2006-07-13 Murata Mfg Co Ltd コモンモードチョークコイル部品

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20040001488A (ko) * 2002-06-28 2004-01-07 주식회사 하이닉스반도체 캐패시터 형성 방법
KR20040060416A (ko) * 2002-12-30 2004-07-06 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법

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US7416997B2 (en) 2008-08-26
US20060160358A1 (en) 2006-07-20
JP4795028B2 (ja) 2011-10-19
JP2006203202A (ja) 2006-08-03

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