KR100348233B1 - 반도체장치의제조방법 - Google Patents
반도체장치의제조방법 Download PDFInfo
- Publication number
- KR100348233B1 KR100348233B1 KR1019950012817A KR19950012817A KR100348233B1 KR 100348233 B1 KR100348233 B1 KR 100348233B1 KR 1019950012817 A KR1019950012817 A KR 1019950012817A KR 19950012817 A KR19950012817 A KR 19950012817A KR 100348233 B1 KR100348233 B1 KR 100348233B1
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor
- layer
- slice
- conductive
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
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- H10P72/74—
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- H10W20/20—
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- H10W72/019—
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- H10W72/90—
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
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- H10P72/7426—
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- H10P72/743—
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- H10P72/7432—
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- H10W72/536—
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- H10W72/59—
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- H10W72/951—
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- H10W72/952—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/012—Bonding, e.g. electrostatic for strain gauges
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Wire Bonding (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Weting (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| BE941527 | 1994-05-24 | ||
| BE9400527A BE1008384A3 (nl) | 1994-05-24 | 1994-05-24 | Werkwijze voor het vervaardigen van halfgeleiderinrichtingen met halfgeleiderelementen gevormd in een op een dragerplak aangebrachte laag halfgeleidermateriaal. |
| BE09400527 | 1994-05-24 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR950034534A KR950034534A (ko) | 1995-12-28 |
| KR100348233B1 true KR100348233B1 (ko) | 2002-11-02 |
Family
ID=3888174
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950012817A Expired - Lifetime KR100348233B1 (ko) | 1994-05-24 | 1995-05-23 | 반도체장치의제조방법 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5504036A (enExample) |
| EP (1) | EP0684643B1 (enExample) |
| JP (1) | JP2987081B2 (enExample) |
| KR (1) | KR100348233B1 (enExample) |
| CN (1) | CN1061783C (enExample) |
| BE (1) | BE1008384A3 (enExample) |
| DE (1) | DE69505048T2 (enExample) |
| TW (1) | TW288193B (enExample) |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6204074B1 (en) * | 1995-01-09 | 2001-03-20 | International Business Machines Corporation | Chip design process for wire bond and flip-chip package |
| DE69622339T2 (de) * | 1995-05-10 | 2003-03-06 | Koninklijke Philips Electronics N.V., Eindhoven | Verfahren zum herstellen einer einrichtung, bei der ein substrat mit halbleiterelement und leiterbahnen auf ein trägersubstrat mit metallisierung aufgeklebt wird |
| EP0888701B1 (en) * | 1996-01-31 | 2007-10-03 | Cochlear Limited | Thin film fabrication technique for implantable electrodes |
| US5698474A (en) * | 1996-02-26 | 1997-12-16 | Hypervision, Inc. | High speed diamond-based machining of silicon semiconductor die in wafer and packaged form for backside emission microscope detection |
| JP2839007B2 (ja) * | 1996-04-18 | 1998-12-16 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US5965933A (en) * | 1996-05-28 | 1999-10-12 | Young; William R. | Semiconductor packaging apparatus |
| EP1503406A3 (en) * | 1996-10-29 | 2009-07-08 | Tru-Si Technologies, Inc. | Back-side contact pads of a semiconductor chip |
| JP3537447B2 (ja) * | 1996-10-29 | 2004-06-14 | トル‐シ・テクノロジーズ・インコーポレイテッド | 集積回路及びその製造方法 |
| US6882030B2 (en) | 1996-10-29 | 2005-04-19 | Tru-Si Technologies, Inc. | Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate |
| US5897371A (en) * | 1996-12-19 | 1999-04-27 | Cypress Semiconductor Corp. | Alignment process compatible with chemical mechanical polishing |
| EP1148546A1 (de) | 2000-04-19 | 2001-10-24 | Infineon Technologies AG | Verfahren zur Justierung von Strukturen auf einem Halbleiter-substrat |
| US6717254B2 (en) | 2001-02-22 | 2004-04-06 | Tru-Si Technologies, Inc. | Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture |
| JP3788268B2 (ja) * | 2001-05-14 | 2006-06-21 | ソニー株式会社 | 半導体装置の製造方法 |
| TW487958B (en) * | 2001-06-07 | 2002-05-21 | Ind Tech Res Inst | Manufacturing method of thin film transistor panel |
| US7831151B2 (en) | 2001-06-29 | 2010-11-09 | John Trezza | Redundant optical device array |
| US6753199B2 (en) * | 2001-06-29 | 2004-06-22 | Xanoptix, Inc. | Topside active optical device apparatus and method |
| US6787916B2 (en) | 2001-09-13 | 2004-09-07 | Tru-Si Technologies, Inc. | Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity |
| JP4110390B2 (ja) * | 2002-03-19 | 2008-07-02 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
| US20030189215A1 (en) | 2002-04-09 | 2003-10-09 | Jong-Lam Lee | Method of fabricating vertical structure leds |
| US8294172B2 (en) * | 2002-04-09 | 2012-10-23 | Lg Electronics Inc. | Method of fabricating vertical devices using a metal support film |
| US6841802B2 (en) * | 2002-06-26 | 2005-01-11 | Oriol, Inc. | Thin film light emitting diode |
| JP2005150686A (ja) * | 2003-10-22 | 2005-06-09 | Sharp Corp | 半導体装置およびその製造方法 |
| JP2008509445A (ja) * | 2004-08-09 | 2008-03-27 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 所定量を有する少なくとも2種類の流体及び/又は気体を一緒にする方法 |
| EP1800344A2 (en) * | 2004-10-05 | 2007-06-27 | Koninklijke Philips Electronics N.V. | Semiconductor device and use thereof |
| EP1900018A2 (en) * | 2005-06-29 | 2008-03-19 | Koninklijke Philips Electronics N.V. | Method of manufacturing an assembly and assembly |
| JP2008078486A (ja) * | 2006-09-22 | 2008-04-03 | Oki Electric Ind Co Ltd | 半導体素子 |
| GB2492532B (en) * | 2011-06-27 | 2015-06-03 | Pragmatic Printing Ltd | Transistor and its method of manufacture |
| GB2492442B (en) * | 2011-06-27 | 2015-11-04 | Pragmatic Printing Ltd | Transistor and its method of manufacture |
| US9728498B2 (en) * | 2015-06-30 | 2017-08-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4532003A (en) * | 1982-08-09 | 1985-07-30 | Harris Corporation | Method of fabrication bipolar transistor with improved base collector breakdown voltage and collector series resistance |
| US4596069A (en) * | 1984-07-13 | 1986-06-24 | Texas Instruments Incorporated | Three dimensional processing for monolithic IMPATTs |
| JPS6418248A (en) * | 1987-07-13 | 1989-01-23 | Nec Corp | Manufacture of semiconductor device |
| US5081061A (en) * | 1990-02-23 | 1992-01-14 | Harris Corporation | Manufacturing ultra-thin dielectrically isolated wafers |
| US5347154A (en) * | 1990-11-15 | 1994-09-13 | Seiko Instruments Inc. | Light valve device using semiconductive composite substrate |
| US5091330A (en) * | 1990-12-28 | 1992-02-25 | Motorola, Inc. | Method of fabricating a dielectric isolated area |
-
1994
- 1994-05-24 BE BE9400527A patent/BE1008384A3/nl not_active IP Right Cessation
-
1995
- 1995-05-16 EP EP95201277A patent/EP0684643B1/en not_active Expired - Lifetime
- 1995-05-16 DE DE69505048T patent/DE69505048T2/de not_active Expired - Lifetime
- 1995-05-22 JP JP7122303A patent/JP2987081B2/ja not_active Expired - Lifetime
- 1995-05-23 KR KR1019950012817A patent/KR100348233B1/ko not_active Expired - Lifetime
- 1995-05-23 US US08/447,597 patent/US5504036A/en not_active Expired - Lifetime
- 1995-05-24 CN CN95108567A patent/CN1061783C/zh not_active Expired - Lifetime
- 1995-05-25 TW TW084105282A patent/TW288193B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JP2987081B2 (ja) | 1999-12-06 |
| KR950034534A (ko) | 1995-12-28 |
| CN1115118A (zh) | 1996-01-17 |
| TW288193B (enExample) | 1996-10-11 |
| JPH07321298A (ja) | 1995-12-08 |
| EP0684643B1 (en) | 1998-09-30 |
| CN1061783C (zh) | 2001-02-07 |
| DE69505048T2 (de) | 1999-05-12 |
| DE69505048D1 (de) | 1998-11-05 |
| EP0684643A1 (en) | 1995-11-29 |
| US5504036A (en) | 1996-04-02 |
| BE1008384A3 (nl) | 1996-04-02 |
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