JPWO2023074661A5 - - Google Patents

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Publication number
JPWO2023074661A5
JPWO2023074661A5 JP2023556450A JP2023556450A JPWO2023074661A5 JP WO2023074661 A5 JPWO2023074661 A5 JP WO2023074661A5 JP 2023556450 A JP2023556450 A JP 2023556450A JP 2023556450 A JP2023556450 A JP 2023556450A JP WO2023074661 A5 JPWO2023074661 A5 JP WO2023074661A5
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JP
Japan
Prior art keywords
layer
wiring board
electrolytic plating
width
recess
Prior art date
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JP2023556450A
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English (en)
Japanese (ja)
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JPWO2023074661A1 (https=
JP7660699B2 (ja
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Priority claimed from PCT/JP2022/039641 external-priority patent/WO2023074661A1/ja
Publication of JPWO2023074661A1 publication Critical patent/JPWO2023074661A1/ja
Publication of JPWO2023074661A5 publication Critical patent/JPWO2023074661A5/ja
Application granted granted Critical
Publication of JP7660699B2 publication Critical patent/JP7660699B2/ja
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JP2023556450A 2021-10-28 2022-10-25 配線基板およびその製造方法 Active JP7660699B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021176324 2021-10-28
JP2021176324 2021-10-28
PCT/JP2022/039641 WO2023074661A1 (ja) 2021-10-28 2022-10-25 配線基板およびその製造方法

Publications (3)

Publication Number Publication Date
JPWO2023074661A1 JPWO2023074661A1 (https=) 2023-05-04
JPWO2023074661A5 true JPWO2023074661A5 (https=) 2024-07-08
JP7660699B2 JP7660699B2 (ja) 2025-04-11

Family

ID=86157798

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023556450A Active JP7660699B2 (ja) 2021-10-28 2022-10-25 配線基板およびその製造方法

Country Status (6)

Country Link
US (1) US20240422900A1 (https=)
JP (1) JP7660699B2 (https=)
KR (1) KR20240056637A (https=)
CN (1) CN118120341A (https=)
TW (1) TWI843260B (https=)
WO (1) WO2023074661A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2024006475A (ja) * 2022-07-01 2024-01-17 イビデン株式会社 配線基板

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001060589A (ja) * 1999-08-20 2001-03-06 Matsushita Electronics Industry Corp 半導体装置の製造方法
JP2004149926A (ja) 2003-11-20 2004-05-27 Matsushita Electric Ind Co Ltd 埋め込み配線の形成方法
JP2005183452A (ja) 2003-12-16 2005-07-07 Fujikura Ltd 端子部の接合構造及び接合方法
JP4395388B2 (ja) 2004-02-20 2010-01-06 京セラ株式会社 配線基板およびその製造方法
JP6819599B2 (ja) * 2015-09-25 2021-01-27 大日本印刷株式会社 実装部品、配線基板、電子装置、およびその製造方法
JP6783614B2 (ja) * 2016-10-11 2020-11-11 株式会社ディスコ 配線基板の製造方法
JP7063101B2 (ja) 2018-05-11 2022-05-09 住友電気工業株式会社 プリント配線板及びプリント配線板の製造方法
CN112586098B (zh) * 2018-09-28 2021-09-21 三井金属矿业株式会社 多层布线板的制造方法

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