JPWO2021234500A5 - - Google Patents

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Publication number
JPWO2021234500A5
JPWO2021234500A5 JP2022523739A JP2022523739A JPWO2021234500A5 JP WO2021234500 A5 JPWO2021234500 A5 JP WO2021234500A5 JP 2022523739 A JP2022523739 A JP 2022523739A JP 2022523739 A JP2022523739 A JP 2022523739A JP WO2021234500 A5 JPWO2021234500 A5 JP WO2021234500A5
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JP
Japan
Prior art keywords
circuit
data
function
memory
input data
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JP2022523739A
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English (en)
Japanese (ja)
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JPWO2021234500A1 (https=
JP7629914B2 (ja
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Priority claimed from PCT/IB2021/053933 external-priority patent/WO2021234500A1/ja
Publication of JPWO2021234500A1 publication Critical patent/JPWO2021234500A1/ja
Publication of JPWO2021234500A5 publication Critical patent/JPWO2021234500A5/ja
Priority to JP2025016315A priority Critical patent/JP2025065240A/ja
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Publication of JP7629914B2 publication Critical patent/JP7629914B2/ja
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JP2022523739A 2020-05-22 2021-05-10 半導体装置 Active JP7629914B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025016315A JP2025065240A (ja) 2020-05-22 2025-02-03 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020089279 2020-05-22
JP2020089279 2020-05-22
PCT/IB2021/053933 WO2021234500A1 (ja) 2020-05-22 2021-05-10 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025016315A Division JP2025065240A (ja) 2020-05-22 2025-02-03 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2021234500A1 JPWO2021234500A1 (https=) 2021-11-25
JPWO2021234500A5 true JPWO2021234500A5 (https=) 2024-05-07
JP7629914B2 JP7629914B2 (ja) 2025-02-14

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ID=78708186

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JP2022523739A Active JP7629914B2 (ja) 2020-05-22 2021-05-10 半導体装置
JP2025016315A Pending JP2025065240A (ja) 2020-05-22 2025-02-03 半導体装置

Family Applications After (1)

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JP2025016315A Pending JP2025065240A (ja) 2020-05-22 2025-02-03 半導体装置

Country Status (3)

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US (1) US20230176818A1 (https=)
JP (2) JP7629914B2 (https=)
WO (1) WO2021234500A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI842855B (zh) * 2019-03-29 2024-05-21 日商半導體能源研究所股份有限公司 半導體裝置
US20230281434A1 (en) * 2022-03-07 2023-09-07 Everspin Technologies, Inc. Systems and methods for a storage bit in an artificial neural network

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3693367B2 (ja) * 1994-07-28 2005-09-07 富士通株式会社 積和演算器
JPH11220358A (ja) * 1998-01-29 1999-08-10 Sanyo Electric Co Ltd デジタルフィルタ
JP2003223433A (ja) * 2002-01-31 2003-08-08 Matsushita Electric Ind Co Ltd 直交変換方法、直交変換装置、符号化方法、符号化装置、逆直交変換方法、逆直交変換装置、復号化方法、及び、復号化装置
JP2008251666A (ja) 2007-03-29 2008-10-16 Tohoku Univ 三次元構造半導体装置
WO2014105154A1 (en) * 2012-12-24 2014-07-03 Intel Corporation Systems, methods, and computer program products for performing mathematical operations
JP6700712B2 (ja) * 2015-10-21 2020-05-27 キヤノン株式会社 畳み込み演算装置
WO2018189620A1 (ja) * 2017-04-14 2018-10-18 株式会社半導体エネルギー研究所 ニューラルネットワーク回路
JP7004453B2 (ja) * 2017-08-11 2022-01-21 株式会社半導体エネルギー研究所 グラフィックスプロセッシングユニット
FR3087907B1 (fr) * 2018-10-24 2021-08-06 St Microelectronics Grenoble 2 Microcontroleur destine a executer un traitement parametrable

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