JPWO2021125094A5 - - Google Patents
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- Publication number
- JPWO2021125094A5 JPWO2021125094A5 JP2021565553A JP2021565553A JPWO2021125094A5 JP WO2021125094 A5 JPWO2021125094 A5 JP WO2021125094A5 JP 2021565553 A JP2021565553 A JP 2021565553A JP 2021565553 A JP2021565553 A JP 2021565553A JP WO2021125094 A5 JPWO2021125094 A5 JP WO2021125094A5
- Authority
- JP
- Japan
- Prior art keywords
- node
- memory device
- semiconductor memory
- nanosheets
- bit line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002135 nanosheet Substances 0.000 claims 63
- 239000004065 semiconductor Substances 0.000 claims 39
- 230000000295 complement effect Effects 0.000 claims 4
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019229339 | 2019-12-19 | ||
| JP2019229339 | 2019-12-19 | ||
| PCT/JP2020/046340 WO2021125094A1 (ja) | 2019-12-19 | 2020-12-11 | 半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2021125094A1 JPWO2021125094A1 (https=) | 2021-06-24 |
| JPWO2021125094A5 true JPWO2021125094A5 (https=) | 2022-08-15 |
| JP7594192B2 JP7594192B2 (ja) | 2024-12-04 |
Family
ID=76478626
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021565553A Active JP7594192B2 (ja) | 2019-12-19 | 2020-12-11 | 半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US12232308B2 (https=) |
| JP (1) | JP7594192B2 (https=) |
| WO (1) | WO2021125094A1 (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020246344A1 (ja) * | 2019-06-03 | 2020-12-10 | 株式会社ソシオネクスト | 半導体記憶装置 |
| JP7640861B2 (ja) * | 2019-10-18 | 2025-03-06 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| US11114153B2 (en) * | 2019-12-30 | 2021-09-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | SRAM devices with reduced coupling capacitance |
| US20220359545A1 (en) * | 2021-05-07 | 2022-11-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor memory devices with dielectric fin structures |
| WO2023171452A1 (ja) * | 2022-03-07 | 2023-09-14 | 株式会社ソシオネクスト | 半導体記憶装置 |
| WO2023204111A1 (ja) * | 2022-04-20 | 2023-10-26 | 株式会社ソシオネクスト | 半導体記憶装置 |
| US20240113104A1 (en) * | 2022-09-30 | 2024-04-04 | Intel Corporation | Forksheet transistor structures with gate cut spine |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7839697B2 (en) | 2006-12-21 | 2010-11-23 | Panasonic Corporation | Semiconductor memory device |
| JP2008176910A (ja) * | 2006-12-21 | 2008-07-31 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| US9362292B1 (en) | 2015-04-17 | 2016-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two-port SRAM cell structure for vertical devices |
| KR102415328B1 (ko) * | 2015-12-03 | 2022-06-30 | 삼성전자주식회사 | 전기적 특성을 개선할 수 있는 에스램 소자 및 이를 포함하는 로직 소자 |
| US9837130B2 (en) * | 2015-12-31 | 2017-12-05 | Taiwan Semiconductor Manufacturing Company Ltd. | Digtial circuit structures to control leakage current |
| WO2017169150A1 (ja) * | 2016-03-28 | 2017-10-05 | 株式会社ソシオネクスト | 半導体集積回路装置 |
| CN109564893B (zh) * | 2016-08-01 | 2022-11-25 | 株式会社索思未来 | 半导体芯片 |
| WO2019077747A1 (ja) * | 2017-10-20 | 2019-04-25 | 株式会社ソシオネクスト | 半導体記憶回路 |
-
2020
- 2020-12-11 WO PCT/JP2020/046340 patent/WO2021125094A1/ja not_active Ceased
- 2020-12-11 JP JP2021565553A patent/JP7594192B2/ja active Active
-
2022
- 2022-06-14 US US17/840,079 patent/US12232308B2/en active Active
-
2025
- 2025-01-15 US US19/022,665 patent/US20250159860A1/en active Pending
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