JPWO2021070246A5 - - Google Patents

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Publication number
JPWO2021070246A5
JPWO2021070246A5 JP2021550973A JP2021550973A JPWO2021070246A5 JP WO2021070246 A5 JPWO2021070246 A5 JP WO2021070246A5 JP 2021550973 A JP2021550973 A JP 2021550973A JP 2021550973 A JP2021550973 A JP 2021550973A JP WO2021070246 A5 JPWO2021070246 A5 JP WO2021070246A5
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JP
Japan
Prior art keywords
voltage
field effect
differential
differential pair
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021550973A
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English (en)
Japanese (ja)
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JPWO2021070246A1 (https=
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Publication date
Application filed filed Critical
Priority claimed from PCT/JP2019/039650 external-priority patent/WO2021070246A1/ja
Publication of JPWO2021070246A1 publication Critical patent/JPWO2021070246A1/ja
Publication of JPWO2021070246A5 publication Critical patent/JPWO2021070246A5/ja
Pending legal-status Critical Current

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JP2021550973A 2019-10-08 2019-10-08 Pending JPWO2021070246A1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/039650 WO2021070246A1 (ja) 2019-10-08 2019-10-08 演算増幅器

Publications (2)

Publication Number Publication Date
JPWO2021070246A1 JPWO2021070246A1 (https=) 2021-04-15
JPWO2021070246A5 true JPWO2021070246A5 (https=) 2022-05-19

Family

ID=75437015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021550973A Pending JPWO2021070246A1 (https=) 2019-10-08 2019-10-08

Country Status (2)

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JP (1) JPWO2021070246A1 (https=)
WO (1) WO2021070246A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20250062732A1 (en) * 2023-08-18 2025-02-20 Renesas Design (UK) Limited Rail-to-rail nMOS Amplifier

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03196279A (ja) * 1989-12-25 1991-08-27 Nec Corp 演算増幅器
JPH03285409A (ja) * 1990-03-30 1991-12-16 Fujitsu Ltd 増幅器
DE19503036C1 (de) * 1995-01-31 1996-02-08 Siemens Ag Differenzverstärker
JP2003069353A (ja) * 2001-08-24 2003-03-07 Toshiba Corp 差動増幅回路および液晶表示装置駆動用半導体集積回路
US7049889B2 (en) * 2004-03-31 2006-05-23 Analog Devices, Inc. Differential stage voltage offset trim circuitry
JP2009302619A (ja) * 2008-06-10 2009-12-24 Toshiba Corp 演算増幅器
JPWO2011092769A1 (ja) * 2010-02-01 2013-05-30 パナソニック株式会社 演算増幅回路、信号駆動装置、表示装置及びオフセット電圧調整方法
US8680922B2 (en) * 2012-01-18 2014-03-25 Analog Devices, Inc. Rail-to rail input circuit
JP6217115B2 (ja) * 2013-04-04 2017-10-25 富士電機株式会社 演算増幅回路

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