JPWO2020013262A1 - 半導体装置および半導体装置を含む半導体システム - Google Patents
半導体装置および半導体装置を含む半導体システム Download PDFInfo
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- JPWO2020013262A1 JPWO2020013262A1 JP2020530248A JP2020530248A JPWO2020013262A1 JP WO2020013262 A1 JPWO2020013262 A1 JP WO2020013262A1 JP 2020530248 A JP2020530248 A JP 2020530248A JP 2020530248 A JP2020530248 A JP 2020530248A JP WO2020013262 A1 JPWO2020013262 A1 JP WO2020013262A1
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02483—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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Abstract
Description
そのため、p型半導体の研究開発が進み、酸化ガリウム(Ga2O3)等の優れた半導体材料を効果的に用いて、高耐圧、低損失および高耐熱を実現できる半導体装置が待ち望まれていた。
[1] コランダム構造を有するか、または酸化ガリウムもしくはその混晶を主成分として含む酸化物半導体膜を含むノーマリオフ型の半導体装置であって、閾値電圧が3V以上であることを特徴とする半導体装置。
[2] 前記酸化物半導体膜が、α−Ga2O3またはその混晶を主成分として含む前記[1]記載の半導体装置。
[3] MOSFETであり、前記閾値電圧がゲート閾値電圧である前記[1]または[2]に記載の半導体装置。
[4] 前記酸化物半導体膜は反転チャネル領域を含み、前記反転チャネル領域上にゲート絶縁膜を介してゲート電極が設けられており、さらに、前記反転チャネル領域と前記ゲート絶縁膜との間に、周期律表第15族の少なくとも1種の元素を含む酸化膜からなる水素拡散防止膜が形成されている前記[3]記載の半導体装置。
[5] 前記元素がリンである前記[4]記載の半導体装置。
[6] 前記反転チャネル領域がp型半導体層である前記[4]または[5]に記載の半導体装置。
[7] 前記閾値電圧が、7V以上である前記[1]〜[6]のいずれかに記載の半導体装置。
[8] パワーデバイスである前記[1]〜[7]のいずれかに記載の半導体装置。
[9] 半導体装置を備える半導体システムであって、前記半導体装置が、前記[1]〜[8]のいずれかに記載の半導体装置である半導体システム。
[10] コランダム構造を有する酸化ガリウムを含む結晶を含有する酸化物半導体膜と、3V以上の閾値電圧とを有する半導体装置。
[11] 酸化ガリウムを含む結晶を含有する酸化物半導体膜と、3V以上の閾値電圧とを有する半導体装置。
[12] 前記結晶が混晶である、前記[10]または[11]に記載の半導体装置。
[13] 前記半導体装置がノーマリオフ型の半導体装置である、前記[10]または[11]に記載の半導体装置。
[14] 前記酸化物半導体膜は反転チャネル領域を含み、前記反転チャネル領域上にゲート絶縁膜を介してゲート電極が設けられており、さらに、前記反転チャネル領域と前記ゲート絶縁膜との間に、周期律表第15族の少なくとも1種の元素を含む酸化膜からなる水素拡散防止膜が形成されている、前記[10]または[11]に記載の半導体装置。
[15] 前記元素がリンである、前記[14]記載の半導体装置。
また、コランダム構造を有する酸化物半導体膜は、通常、金属酸化物を主成分として含んでおり、該金属酸化物としては、例えば、酸化アルミニウム、酸化インジウム、酸化イリジウム、酸化ロジウム、酸化鉄などが挙げられる。
なお、「主成分」とは、例えば酸化物半導体膜がα−Ga2O3を主成分として含む場合、前記酸化物半導体膜の金属元素中のガリウムの原子比が0.5以上の割合でα−Ga2O3が含まれていればそれでよい。本発明においては、前記酸化物半導体膜の金属元素中のガリウムの原子比が0.7以上であることが好ましく、0.8以上であるのがより好ましい。また、前記結晶が混晶である場合においても、前記酸化物半導体膜の主成分が酸化ガリウムであるのが好ましい。例えば、酸化物半導体膜がα−(AlGa)2O3を主成分として含む場合も、前記酸化物半導体膜の金属元素中のガリウムの原子比が0.5以上の割合で含まれていればそれでよい。本発明においては、前記酸化物半導体膜の金属元素中のガリウムの原子比が0.7以上であることが好ましく、0.8以上であるのがより好ましい。
原料溶液は、成膜原料として金属を含んでおり、霧化可能であれば特に限定されず、無機材料を含んでいてもよいし、有機材料を含んでいてもよい。前記金属は、金属単体であっても、金属化合物であってもよく、本発明の目的を阻害しない限り特に限定されないが、ガリウム(Ga)、イリジウム(Ir)、インジウム(In)、ロジウム(Rh)、アルミニウム(Al)、金(Au)、銀(Ag)、白金(Pt)、銅(Cu)、鉄(Fe)、マンガン(Mn)、ニッケル(Ni)、パラジウム(Pd)、コバルト(Co)、ルテニウム(Ru)、クロム(Cr)、モリブデン(Mo)、タングステン(W)、タンタル(Ta)、亜鉛(Zn)、鉛(Pb)、レニウム(Re)、チタン(Ti)、スズ(Sn)、ガリウム(Ga)、マグネシウム(Mg)、カルシウム(Ca)およびジルコニウム(Zr)から選ばれる1種または2種以上の金属などが挙げられるが、本発明においては、前記金属が、少なくとも周期律表第4周期〜第6周期の1種または2種以上の金属を含むのが好ましく、少なくともガリウム、インジウム、アルミニウム、ロジウムまたはイリジウムを含むのがより好ましく、少なくともガリウムを含むのが最も好ましい。このような好ましい金属を用いることにより、半導体装置等により好適に用いることができるエピタキシャル膜を成膜することができる。
前記霧化工程は、金属を含む原料溶液を調整し、前記原料溶液を霧化して霧化し、液滴を浮遊させ、霧化液滴を発生させる。前記金属の配合割合は、特に限定されないが、原料溶液全体に対して、0.0001mol/L〜20mol/Lが好ましい。霧化手段は、前記原料溶液を霧化できさえすれば特に限定されず、公知の霧化手段であってよいが、本発明においては、超音波振動を用いる霧化手段であるのが好ましい。本発明で用いられるミストは、空中に浮遊するものであり、例えば、スプレーのように吹き付けるのではなく、初速度がゼロで、空間に浮かびガスとして搬送することが可能なミストであるのがより好ましい。ミストの液滴サイズは、特に限定されず、数mm程度の液滴であってもよいが、好ましくは50μm以下であり、より好ましくは1〜10μmである。
前記搬送工程では、前記キャリアガスによって前記霧化液滴を前記基体へ搬送する。キャリアガスの種類としては、本発明の目的を阻害しない限り特に限定されず、例えば、酸素、オゾン、不活性ガス(例えば窒素やアルゴン等)、または還元ガス(水素ガスやフォーミングガス等)などが好適な例として挙げられる。また、キャリアガスの種類は1種類であってよいが、2種類以上であってもよく、キャリアガス濃度を変化させた希釈ガス(例えば10倍希釈ガス等)などを、第2のキャリアガスとしてさらに用いてもよい。また、キャリアガスの供給箇所も1箇所だけでなく、2箇所以上あってもよい。キャリアガスの流量は、特に限定されないが、前記搬送を供給律速となるような流量が好ましく、より具体的には1LPM以下が好ましく、0.1〜1LPMがより好ましい。
成膜工程では、前記霧化液滴を反応させて、前記基体上に成膜する。前記反応は、前記霧化液滴から膜が形成される反応であれば特に限定されないが、本発明においては、熱反応が好ましい。前記熱反応は、熱でもって前記霧化液滴が反応すればそれでよく、反応条件等も本発明の目的を阻害しない限り特に限定されない。本工程においては、前記熱反応を、通常、原料溶液の溶媒の蒸発温度以上の温度で行うが、高すぎない温度以下が好ましく、650℃以下がより好ましい。また、熱反応は、本発明の目的を阻害しない限り、真空下、非酸素雰囲気下、還元ガス雰囲気下および酸素雰囲気下のいずれの雰囲気下で行われてもよく、また、大気圧下、加圧下および減圧下のいずれの条件下で行われてもよいが、本発明においては、大気圧下で行われるのが蒸発温度の計算がより簡単になり、設備等も簡素化できる等の点で好ましい。また、膜厚は成膜時間を調整することにより、設定することができる。
前記基体は、前記半導体膜を支持できるものであれば特に限定されない。前記基体の材料も、本発明の目的を阻害しない限り特に限定されず、公知の基体であってよく、有機化合物であってもよいし、無機化合物であってもよい。前記基体の形状としては、どのような形状のものであってもよく、あらゆる形状に対して有効であり、例えば、平板や円板等の板状、繊維状、棒状、円柱状、角柱状、筒状、螺旋状、球状、リング状などが挙げられるが、本発明においては、基板が好ましい。基板の厚さは、本発明においては特に限定されない。
本発明の半導体装置がMOSFETである場合の好適な例を図2に示す。図2の半導体装置500は、横型のMOSFETであり、第1の半導体領域1aとして、n+型半導体層(n+型ソース層)、第2の半導体領域1bとしてn+型半導体層(n+型ドレイン層)、酸化物半導体膜2としてp型半導体層、p型半導体層内に位置しており、かつ表面にリンを含む酸化膜が形成されている反転チャネル領域2a、金属酸化物層3、絶縁膜4a(ゲート絶縁膜)、絶縁膜4b(フィールド絶縁膜)、第3の電極5aとしてゲート電極、第1の電極5bとしてソース電極、第2の電極5cとしてドレイン電極および基板9を備えている。金属酸化物層3は、酸化ガリウムを含んでいる。金属酸化物層3が、主成分として酸化ガリウムを含んでいてもよい。また、金属酸化物層3は、酸化物半導体膜2よりも高抵抗の膜であるのが好ましく、ドーパントを含まない層であるのが好ましい。
1.p型半導体層の形成
1−1.成膜装置
図1の成膜装置19を用いた。
0.1M臭化ガリウム水溶液に臭化水素酸を体積比で20%含有させ、さらにMgを1体積%の割合で加え、これを原料溶液とした。
上記1−2.で得られた原料溶液24aをミスト発生源24内に収容した。次に、基板20として、表面にノンドープのα−Ga2O3膜が形成されているサファイア基板をサセプタ21上に設置し、ヒーター28を作動させて成膜室30内の温度を520℃にまで昇温させた。次に、流量調節弁23a、23bを開いて、キャリアガス源であるキャリアガス供給手段22a、22bからキャリアガスを成膜室30内に供給し、成膜室30の雰囲気をキャリアガスで十分に置換した後、キャリアガスの流量を1LPMに、キャリアガス(希釈)の流量を1LPMにそれぞれ調節した。なお、キャリアガスとして窒素を用いた。
次に、超音波振動子26を2.4MHzで振動させ、その振動を、水25aを通じて原料溶液24aに伝播させることによって、原料溶液24aを霧化させてミストを生成した。このミストが、キャリアガスによって成膜室30内に導入され、大気圧下、520℃にて、成膜室30内でミストが反応して、基板20上に半導体膜が形成された。なお、膜厚は0.6μmであり、成膜時間は15分間であった。
XRD回折装置を用いて、上記1−4.にて得られた膜の相の同定を行ったところ、得られた膜はα−Ga203であった。
0.1M臭化ガリウム水溶液に体積比で臭化水素酸10%および臭化スズ8%をそれぞれ含有させ、これを原料溶液としたこと、ならびに成膜温度を580℃および成膜時間を5分間としたこと以外、上記1.と同様にして、上記1.で得られたp型半導体層上にn+型半導体膜を成膜した。得られた膜につき、XRD回折装置を用いて、膜の相の同定を行ったところ、得られた膜はα−Ga203であった。
ゲート部に対応する領域のn+型半導体層(1aと1bとの間)をリン酸でエッチングし、さらに、半導体膜上にリンを少なくとも含む酸化膜が形成されるようにリン酸で処理した後、スパッタにてSiO2を成膜した。また、フォトリソグラフィー、エッチング処理、電子ビーム蒸着処理等に付し、図2に示すとおり、MOSFETを作製した。なお、電極にはいずれもTiを用いた。また、得られたMOSFETにつき、参考までに上面からみた写真を図3に示す。
得られたMOSFETにつき、IV測定を実施した。IV測定結果を図4に示す。図4から明らかなとおり、反転チャネル領域が形成され、酸化ガリウム半導体のMOSFETがトランジスタとして良好に動作することが世界で初めて実証された。そして、得られたIV特性から求められたゲート閾値電圧は、7.9Vであった。
なお、上記3.において、リンを少なくとも含む酸化膜がp型半導体層とゲート絶縁膜(SiO2膜)との間に形成されているのかどうかにつき、SIMS測定で実施して確認した。SIMS測定結果を図5に示す。図5から、p型半導体層とゲート絶縁膜との間にリンを含む酸化膜が形成されており、さらには、ゲート絶縁膜の水素のp型半導体層への拡散を良好に防いでいることがわかる。
1b 第2の半導体領域
2 酸化物半導体膜
2a 反転チャネル領域
2b 酸化膜
2c 酸化物半導体膜の第2面
3 金属酸化物層
4a 絶縁膜
4b 絶縁膜
5a 第3の電極
5b 第1の電極
5c 第2の電極
6 第3の半導体領域
9 基板
19 成膜装置
20 基板
21 サセプタ
22a キャリアガス源
22b キャリアガス(希釈)源
23a キャリアガス源の流量調節弁
23b キャリアガス(希釈)源の流量調節弁
24 ミスト発生源
24a 原料溶液
25 容器
25a 水
26 超音波振動子
27 供給管
28 ヒーター
29 排気口
50b 第1の電極のコンタクト面
100 半導体装置
170 電源システム
171 電源装置
172 電源装置
173 制御回路
180 システム装置
181 電子回路
182 電源システム
192 インバータ
193 トランス
194 MOSFET
195 DCL
196 PWM制御回路
197 電圧比較器
500 半導体装置
600 半導体装置
Claims (15)
- コランダム構造を有するか、または酸化ガリウムもしくはその混晶を主成分として含む酸化物半導体膜を含むノーマリオフ型の半導体装置であって、閾値電圧が3V以上であることを特徴とする半導体装置。
- 前記酸化物半導体膜が、α−Ga2O3またはその混晶を主成分として含む請求項1記載の半導体装置。
- MOSFETであり、前記閾値電圧がゲート閾値電圧である請求項1または2に記載の半導体装置。
- 前記酸化物半導体膜は反転チャネル領域を含み、前記反転チャネル領域上にゲート絶縁膜を介してゲート電極が設けられており、さらに、前記反転チャネル領域と前記ゲート絶縁膜との間に、周期律表第15族の少なくとも1種の元素を含む酸化膜からなる水素拡散防止膜が形成されている請求項3記載の半導体装置。
- 前記元素がリンである請求項4記載の半導体装置。
- 前記反転チャネル領域がp型半導体層である請求項4または5に記載の半導体装置。
- 前記閾値電圧が、7V以上である請求項1〜6のいずれかに記載の半導体装置。
- パワーデバイスである請求項1〜7のいずれかに記載の半導体装置。
- 半導体装置を備える半導体システムであって、前記半導体装置が、請求項1〜8のいずれかに記載の半導体装置である半導体システム。
- コランダム構造を有する酸化ガリウムを含む結晶を含有する酸化物半導体膜と、3V以上の閾値電圧とを有する半導体装置。
- 酸化ガリウムを含む結晶を含有する酸化物半導体膜と、3V以上の閾値電圧とを有する半導体装置。
- 前記結晶が混晶である、請求項10または11に記載の半導体装置。
- 前記半導体装置がノーマリオフ型の半導体装置である、請求項10または11に記載の半導体装置。
- 前記酸化物半導体膜は反転チャネル領域を含み、前記反転チャネル領域上にゲート絶縁膜を介してゲート電極が設けられており、さらに、前記反転チャネル領域と前記ゲート絶縁膜との間に、周期律表第15族の少なくとも1種の元素を含む酸化膜からなる水素拡散防止膜が形成されている請求項10または11に記載の半導体装置。
- 前記元素がリンである請求項14記載の半導体装置。
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WO2020013262A1 (ja) | 2020-01-16 |
JP7404594B2 (ja) | 2023-12-26 |
US20200388684A1 (en) | 2020-12-10 |
TW202013735A (zh) | 2020-04-01 |
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