WO2021106810A1 - 半導体装置および半導体システム - Google Patents
半導体装置および半導体システム Download PDFInfo
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- WO2021106810A1 WO2021106810A1 PCT/JP2020/043518 JP2020043518W WO2021106810A1 WO 2021106810 A1 WO2021106810 A1 WO 2021106810A1 JP 2020043518 W JP2020043518 W JP 2020043518W WO 2021106810 A1 WO2021106810 A1 WO 2021106810A1
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- semiconductor device
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- semiconductor
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- semiconductor layer
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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Definitions
- the present invention relates to a semiconductor device useful as a power device or the like and a semiconductor system including the same.
- gallium oxide As a next-generation switching element capable of achieving high withstand voltage, low loss, and high heat resistance, semiconductor devices using gallium oxide (Ga 2 O 3 ) having a large bandgap are attracting attention, and are used for power semiconductor devices such as inverters. Expected to be applied. Moreover, due to its wide bandgap, it is expected to be applied as a light receiving / receiving device for LEDs and sensors. According to Non-Patent Document 1, the gallium oxide can control the bandgap by mixing indium and aluminum individually or in combination, and constitutes an extremely attractive material system as an InAlGaO-based semiconductor. ..
- Patent Document 1 ⁇ -Ga 2 O 3- based crystals are obtained by the FZ method using MgO (p-type dopant source). It is described that when formed, a substrate exhibiting p-type conductivity can be obtained. Further, Patent Document 2 describes that a p-type semiconductor is formed by ion-implanting a p-type dopant into an ⁇ - (Al x Ga 1-x ) 2 O 3 single crystal film formed by the MBE method. ..
- Non-Patent Document 2 it is difficult to manufacture a p-type semiconductor by these methods (Non-Patent Document 2), and it has not been reported that the p-type semiconductor was actually successfully manufactured by these methods. Therefore, a feasible p-type oxide semiconductor and a method for producing the same have been long-awaited.
- Non-Patent Document 3 and Non-Patent Document 4 for example, use of Rh 2 O 3 or Zn Rh 2 O 4 for a p-type semiconductor has been studied, but Rh 2 O 3 is a method. There is a problem that the concentration of the raw material becomes particularly low at the time of film formation, which affects the film formation, and it is difficult to produce a Rh 2 O 3 single crystal even if an organic solvent is used. In addition, even if the Hall effect measurement is performed, it is not determined to be p-type, and there is a problem that the measurement itself is not possible. Also, regarding the measured value, for example, the Hall coefficient is the measurement limit (0.2 cm 3 /). C) There were only the following, which became a practical problem. Further, since ZnRh 2 O 4 has low mobility and a narrow band gap, there is a problem that it cannot be used for LEDs and power devices, and these are not always satisfactory.
- Patent Document 3 describes that delafosite, oxycalcogenide, and the like are used as p-type semiconductors.
- these semiconductors have a mobility of about 1 cm 2 / V ⁇ s or less, have poor electrical characteristics, and have a pn junction with an n-type next-generation oxide semiconductor such as ⁇ -Ga 2 O 3.
- I could't do well.
- Ir 2 O 3 has been known.
- Patent Document 4 describes that Ir 2 O 3 is used as an iridium catalyst.
- Patent Document 5 describes that Ir 2 O 3 is used as a dielectric.
- Patent Document 6 describes that Ir 2 O 3 is used for the electrode.
- Ir 2 O 3 is used for the electrode.
- it has not been known to use Ir 2 O 3 in the p-type semiconductor recently, the present applicants, as a p-type semiconductor, is considered to use Ir 2 O 3, research and development is proceeding ing.
- power devices such as transistors, low on-resistance and high withstand voltage are required, but there are still problems in electrical characteristics such as leakage current.
- gallium oxide (Ga 2 O 3 ) has an dielectric breakdown electric field strength of about 10, low on-resistance, and excellent semiconductor characteristics.
- these semiconductor characteristics can be improved. There was a problem that it could not be fully exerted.
- an oxide semiconductor having a bandgap of 3 eV or more has the same problem. Specifically, there is a problem that the junction leakage current, which tends to occur due to ion implantation, adversely affects the electrical characteristics of the oxide semiconductor. Therefore, the problem of such electrical characteristics is solved and gallium oxide (Ga) is solved. 2 O 3) was excellent semiconductor material effectively with such a high withstand voltage semiconductor device that can achieve low loss and high heat resistance has been awaited.
- Japanese Unexamined Patent Publication No. 2005-340308 Japanese Unexamined Patent Publication No. 2013-58637 Japanese Unexamined Patent Publication No. 2016-25256 Japanese Unexamined Patent Publication No. 9-25255 Japanese Unexamined Patent Publication No. 8-227793 Japanese Unexamined Patent Publication No. 11-21687
- An object of the present invention is to provide a semiconductor device having excellent semiconductor characteristics, which is useful as a power device or the like.
- the present inventors have made intensive studies to achieve the above object, placing 1.0 ⁇ 10 6 ⁇ ⁇ cm or more of the high-resistance oxide film along the direction of current flow, surprisingly, produced
- the present inventors have further studied and completed the present invention.
- the present invention relates to the following invention.
- the crystalline oxide semiconductor layer is disposed further high-resistance oxide film, the resistance of the high resistance oxide film is 1.0 ⁇ 10 6 ⁇ ⁇ cm or more [1] - The semiconductor device according to any one of [3].
- the semiconductor device of the present invention is useful as a power device or the like and has excellent semiconductor characteristics.
- FIG. 1 It is a figure which shows typically one preferable aspect of the MOSFET of this invention as an example, (a) shows typically the upper surface of MOSFET, (b) shows the cross section between BB'in (a) typically. Shown. It is a figure which shows typically one preferable aspect of the MOSFET of this invention as an example. It is a figure which shows the IV measurement result in an Example. It is a figure which shows typically a preferable example of a power-source system. It is a figure which shows typically a preferable example of a system apparatus. It is a figure which shows typically a preferable example of the power supply circuit diagram of a power supply device.
- the semiconductor device includes a crystalline oxide semiconductor layer, the band gap of the crystalline oxide semiconductor layer is 3 eV or more, and the field effect mobility is 30 cm 2 / V ⁇ s or more. It is a feature.
- the band gap of the crystalline oxide semiconductor layer is preferably 4.5 eV or more, and more preferably 5 eV or more.
- the crystalline oxide semiconductor layer has a corundum structure, and it is also preferable that the crystalline oxide semiconductor layer is made of an oxide semiconductor film.
- the oxide semiconductor film is preferably an oxide semiconductor film containing gallium oxide (Ga 2 O 3 ) or a mixed crystal thereof as a main component.
- the electric field effect mobility is preferably 60 cm 2 / V ⁇ s or more.
- the crystalline oxide semiconductor layer, a high-resistance oxide film resistance is equal to 1.0 ⁇ 10 6 ⁇ ⁇ cm or more, and arranged along the direction of current flow deposition It can be easily obtained by manufacturing the semiconductor device.
- the field effect mobility usually means the maximum field effect mobility, and refers to the field effect mobility of a semiconductor device such as a transistor, which is calculated using the output current data corresponding to the semiconductor device. Further, according to the above preferable range, an on / off ratio of 1000 or more (more preferably 100,000 or more) can be easily realized.
- the “on / off ratio” refers to the ratio of the on-current to the off-current of the semiconductor device.
- the off-current means, for example, the current flowing between the source electrode and the drain electrode when the semiconductor device is off, when the semiconductor device includes at least a source electrode and a drain electrode.
- the on-current refers to a current that flows between the source electrode and the drain electrode when the semiconductor device is on.
- the semiconductor device at least a gate electrode, when a source electrode and a drain electrode, or 1.0 ⁇ 10 6 ⁇ ⁇ cm for the high-resistance oxide film between the drain electrode and the source electrode It can be easily obtained by forming a film to produce the semiconductor device.
- the semiconductor device is a semiconductor device in which at least a gate electrode, a source electrode, a drain electrode, and a high resistance oxide film are formed on the substrate directly or via another layer, 1. It can be easily obtained by forming the semiconductor device by forming a high resistance oxide film of 0 ⁇ 10 6 ⁇ ⁇ cm or more between the source electrode and / and the drain electrode and the substrate.
- the high resistance oxide film is not particularly limited as long as an oxide film having a 1.0 ⁇ 10 6 ⁇ ⁇ cm or more resistors, in embodiments of the present invention, the resistance of the high resistance oxide film It is preferably 1.0 ⁇ 10 10 ⁇ ⁇ cm or more, and more preferably the resistance of the high resistance oxide film is 1.0 ⁇ 10 12 ⁇ ⁇ cm or more.
- the resistance of the high resistance oxide film means the electrical resistivity [ ⁇ ⁇ cm] of the high resistance oxide film. The resistance can be measured by forming a measurement electrode on the high resistance oxide film and passing an electric current through it.
- the upper limit of the resistance is not particularly limited, but is preferably 1.0 ⁇ 10 15 ⁇ ⁇ cm, and more preferably 1.0 ⁇ 10 14 ⁇ ⁇ cm. Further, in the embodiment of the present invention, it is preferable that the high resistance oxide film is a current block layer. By using the high resistance oxide film as the current block layer, more excellent electrical characteristics can be obtained.
- the constituent material of the high resistance oxide film is not particularly limited, but in the embodiment of the present invention, a crystal film is preferable.
- the crystal film may be a polycrystalline film or a single crystal film.
- the crystal structure of the crystal film is also not particularly limited, but in the embodiment of the present invention, it is preferable to have a corundum structure.
- the constituent material of the high resistance oxide film preferably contains gallium, and more preferably Ga 2 O 3. Further, in the embodiment of the present invention, it is preferable that the high resistance oxide film contains a p-type dopant.
- the semiconductor device further includes a channel forming region, and the high resistance oxide film is arranged under the channel forming region.
- a high field effect mobility of 30 cm 2 / V ⁇ s or more (more preferably 60 cm 2 / V ⁇ s or more) can be easily realized.
- the electric field effect mobility usually means the maximum electric field effect mobility.
- an on / off ratio of 1000 or more (more preferably 100,000 or more) can be easily realized.
- the high resistance oxide film is preferably an oxide semiconductor film containing gallium oxide (Ga 2 O 3 ) or a mixed crystal thereof as a main component.
- the oxide semiconductor film in the crystalline oxide semiconductor layer or the high resistance oxide film may be a p-type semiconductor film or an n-type semiconductor film.
- the gallium oxide include ⁇ -Ga 2 O 3 , ⁇ -Ga 2 O 3 , ⁇ -Ga 2 O 3, and the like, and among them, ⁇ -Ga 2 O 3 is preferable.
- the mixed crystal of gallium oxide include a mixed crystal of the gallium oxide and one or more kinds of metal oxides, and a preferable example of the metal oxide is, for example, aluminum oxide.
- the "main component" is, for example, when the oxide semiconductor film contains ⁇ -Ga 2 O 3 as the main component, the atomic ratio of gallium in the metal element of the oxide semiconductor film is 0.5 or more. It is sufficient if ⁇ -Ga 2 O 3 is contained. In the embodiment of the present invention, the atomic ratio of gallium in the metal element of the oxide semiconductor film is preferably 0.7 or more, more preferably 0.8 or more.
- the oxide semiconductor film contains a mixed crystal of ⁇ -Ga 2 O 3 and ⁇ -Al 2 O 3 as a main component
- the total number of atoms of gallium and aluminum in the metal element of the oxide semiconductor film is It is sufficient if the mixed crystal is contained in a ratio of 0.5 or more, but in the embodiment of the present invention, the atomic ratio of gallium in the metal element of the oxide semiconductor film is further 0.5. It is preferably 0.7 or more, and more preferably 0.7 or more.
- the film thickness of the high resistance oxide film is not particularly limited and may be 1 ⁇ m or less or 1 ⁇ m or more, but in the embodiment of the present invention, it is 1 ⁇ m or more. It is preferably 1 ⁇ m to 40 ⁇ m, more preferably 1 ⁇ m to 25 ⁇ m, and most preferably 1 ⁇ m to 25 ⁇ m. Surface area of the semiconductor film is not particularly limited, and may be 1 mm 2 or more, may be 1 mm 2 or less.
- the high-resistance oxide film may be a single-layer film or a multilayer film.
- the high resistance oxide film is preferably an oxide semiconductor film containing a dopant.
- the dopant is not particularly limited as long as it does not interfere with the object of the present invention, and may be a known one.
- Examples of the dopant include p-type dopants such as Mg, Zn and Ca.
- the content of the dopant is preferably 0.00001 atomic% or more, more preferably 0.00001 atomic% to 20 atomic%, and 0.0001 atomic% to 20 in the composition of the oxide semiconductor film. Most preferably, it is at atomic%.
- the p-type dopant is not particularly limited as long as the oxide semiconductor film can be used as a p-type semiconductor film to impart conductivity, and may be a known one.
- the p-type dopant include Mg, H, Li, Na, K, Rb, Cs, Fr, Be, Ca, Sr, Ba, Ra, Mn, Fe, Co, Ni, Pd, Cu, Ag and Au. , Zn, Cd, Hg, Tl, Pb, N, P and the like, and two or more of these elements.
- the p-type dopant is Mg, Zn or Ca. Is preferable.
- the high resistance oxide film is usually obtained by forming a film by using an epitaxial crystal growth method, but the forming method and the like are particularly limited. Not done.
- the epitaxial crystal growth method is not particularly limited and may be a known method as long as the object of the present invention is not impaired. Examples of the epitaxial crystal growth method include a CVD method, a MOCVD method, a MOVPE method, a mist CVD method, a mist epitaxy method, an MBE method, an HVPE method, and a pulse growth method.
- the epitaxial crystal growth method is preferably a mist CVD method or a mist epitaxy method.
- a raw material solution containing a metal is atomized (atomization step), and the obtained atomized droplets are conveyed to the vicinity of the substrate by a carrier gas (transportation step). Then, it is preferable to carry out by thermally reacting the atomized droplets (deposition step).
- the raw material solution contains a metal as a film-forming raw material, and is not particularly limited as long as it can be atomized, and may contain an inorganic material or an organic material.
- the metal may be a single metal or a metal compound, and is not particularly limited as long as the object of the present invention is not impaired, but gallium (Ga), iridium (Ir), indium (In), and rhodium (Rh).
- It preferably contains at least one or more metals of the 4th to 6th cycles of the periodic table, more preferably at least gallium, indium, aluminum, rhodium or iridium, most preferably at least gallium. preferable.
- a preferable metal an epitaxial film that can be preferably used in a semiconductor device or the like can be formed.
- a solution in which the metal is dissolved or dispersed in an organic solvent or water in the form of a complex or a salt can be preferably used.
- the form of the complex include an acetylacetonate complex, a carbonyl complex, an ammine complex, and a hydride complex.
- the salt form include organic metal salts (for example, metal acetate, metal oxalate, metal citrate, etc.), metal sulfide salts, nitrified metal salts, phosphor oxide metal salts, and metal halide metal salts (for example, metal chloride). Salts, metal bromide salts, metal iodide salts, etc.) and the like.
- the solvent of the raw material solution is not particularly limited as long as the object of the present invention is not impaired, and may be an inorganic solvent such as water, an organic solvent such as alcohol, or an inorganic solvent and an organic solvent. May be a mixed solvent of. In the embodiment of the present invention, it is preferable that the solvent contains water.
- an additive such as a hydrohalic acid or an oxidizing agent may be mixed with the raw material solution.
- the hydrohalic acid include hydrobromic acid, hydrochloric acid, and hydrogen iodide acid.
- the oxidizing agent include hydrogen peroxide (H 2 O 2 ), sodium peroxide (Na 2 O 2 ), barium peroxide (BaO 2 ), benzoyl peroxide (C 6 H 5 CO) 2 O 2 and the like.
- Examples include hydrogen peroxide, hypochlorous acid (HClO), perchloric acid, nitric acid, ozone water, and organic peroxides such as peracetic acid and nitrobenzene.
- the blending ratio of the additive is not particularly limited, but is preferably 0.001% by volume to 50% by volume, more preferably 0.01% by volume to 30% by volume, based on the raw material solution.
- the raw material solution may contain a dopant.
- the dopant is not particularly limited as long as it does not interfere with the object of the present invention.
- Examples of the dopant include the above-mentioned n-type dopant and p-type dopant.
- the concentration of the dopant may usually be about 1 ⁇ 10 16 / cm 3 to 1 ⁇ 10 22 / cm 3 , and the concentration of the dopant should be as low as about 1 ⁇ 10 17 / cm 3 or less, for example. You may. Further, according to the present invention, the dopant may be contained in a high concentration of about 1 ⁇ 10 20 / cm 3 or more.
- the atomization step prepares a raw material solution containing a metal, atomizes the raw material solution, and generates atomized droplets.
- the mixing ratio of the metal is not particularly limited, but is preferably 0.0001 mol / L to 20 mol / L with respect to the entire raw material solution.
- the atomization method is not particularly limited as long as the raw material solution can be atomized, and may be a known atomization method. However, in the embodiment of the present invention, the atomization method uses ultrasonic vibration. Is preferable.
- the atomized droplets (for example, mist) used in the present invention are suspended in the air, and can be transported floating in space with an initial velocity of zero, instead of being sprayed like a spray.
- the droplet size of the atomized droplet is not particularly limited and may be a droplet of about several mm, but is preferably 50 ⁇ m or less, and more preferably 1 to 10 ⁇ m.
- the atomized droplets are transferred to the substrate by the carrier gas.
- the type of carrier gas is not particularly limited as long as the object of the present invention is not impaired, and examples thereof include oxygen, ozone, an inert gas (for example, nitrogen and argon), and a reducing gas (hydrogen gas, forming gas, etc.). A suitable example is given.
- the type of carrier gas may be one type, but may be two or more types, and a diluted gas having a changed carrier gas concentration (for example, a 10-fold diluted gas) or the like is used as the second carrier gas. It may be used further.
- the carrier gas may be supplied not only at one location but also at two or more locations.
- the flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 LPM, and more preferably 0.1 to 10 LPM.
- the atomized droplets are reacted to form a film on the substrate.
- the reaction is not particularly limited as long as it is a reaction in which a film is formed from the atomized droplets, but in the embodiment of the present invention, a thermal reaction is preferable.
- the thermal reaction may be such that the atomized droplets react with heat, and the reaction conditions and the like are not particularly limited as long as the object of the present invention is not impaired.
- the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent of the raw material solution, but the temperature is preferably not too high, more preferably 850 ° C or lower, and most preferably 650 ° C or lower.
- the thermal reaction may be carried out under any atmosphere of vacuum, non-oxygen atmosphere, reducing gas atmosphere and oxygen atmosphere as long as the object of the present invention is not impaired, and the thermal reaction may be carried out under atmospheric pressure or pressure. It may be carried out under either reduced pressure or reduced pressure, but in the embodiment of the present invention, it is easier to calculate the evaporation temperature and the equipment and the like can be simplified if it is carried out under atmospheric pressure. It is preferable in that. Further, the film thickness can be set by adjusting the film formation time.
- the substrate is not particularly limited as long as it can support the film.
- the material of the substrate is not particularly limited as long as it does not impair the object of the present invention, and may be a known substrate, an organic compound, or an inorganic compound.
- the shape of the substrate may be any shape and is effective for any shape, for example, plate-like, fibrous, rod-like, columnar, prismatic, such as a flat plate or a disk. Cylindrical, spiral, spherical, ring-shaped and the like can be mentioned, but in the embodiment of the present invention, a substrate is preferable.
- the thickness of the substrate is not particularly limited in the embodiments of the present invention.
- the substrate is not particularly limited as long as it has a plate shape and serves as a support for the semiconductor film. It may be an insulator substrate, a semiconductor substrate, a metal substrate or a conductive substrate, but the substrate is preferably an insulator substrate, and the surface is made of metal. A substrate having a film is also preferable.
- the substrate includes, for example, a base substrate containing a substrate material having a corundum structure as a main component, a base substrate containing a substrate material having a ⁇ -gaul structure as a main component, and a substrate material having a hexagonal structure as a main component. Examples include a base substrate.
- the “main component” means that the substrate material having the specific crystal structure is preferably 50% or more, more preferably 70% or more, still more preferably 90% or more, in terms of atomic ratio, with respect to all the components of the substrate material. It means that it is contained in% or more, and may be 100%.
- the substrate material is not particularly limited and may be a known one as long as the object of the present invention is not impaired.
- Examples of the substrate material having the corundum structure are ⁇ -Al 2 O 3 (sapphire substrate) or ⁇ -Ga 2 O 3 , and a-plane sapphire substrate, m-plane sapphire substrate, and r-plane sapphire substrate are preferable.
- C-plane sapphire substrate, ⁇ -type gallium oxide substrate (a-plane, m-plane or r-plane) and the like are more preferable examples.
- the base substrate containing the substrate material having a ⁇ -gaul structure as a main component for example, ⁇ -Ga 2 O 3 substrate or Ga 2 O 3 and Al 2 O 3 are included, and Al 2 O 3 is more than 0 wt%.
- Examples thereof include a mixed crystal substrate having a content of 60 wt% or less.
- Examples of the base substrate containing a substrate material having a hexagonal structure as a main component include a SiC substrate, a ZnO substrate, and a GaN substrate.
- an annealing treatment may be performed after the film forming step.
- the annealing treatment temperature is not particularly limited as long as the object of the present invention is not impaired, and is usually 300 ° C. to 650 ° C., preferably 350 ° C. to 550 ° C.
- the annealing treatment time is usually 1 minute to 48 hours, preferably 10 minutes to 24 hours, and more preferably 30 minutes to 12 hours.
- the annealing treatment may be carried out in any atmosphere as long as the object of the present invention is not impaired, but it is preferably in a non-oxygen atmosphere, and more preferably in a nitrogen atmosphere.
- the semiconductor film may be provided directly on the substrate, or the semiconductor film may be provided via another layer such as a buffer layer (buffer layer) or a stress relaxation layer. You may.
- the method for forming each layer is not particularly limited and may be a known method, but in the embodiment of the present invention, a mist CVD method or a mist epitaxy method is preferable.
- the film forming apparatus 19 preferably used for the mist CVD method or the mist epitaxy method will be described with reference to the drawings.
- the film forming apparatus 19 of FIG. 1 supplies a carrier gas source 22a for supplying a carrier gas, a flow control valve 23a for adjusting the flow rate of the carrier gas sent out from the carrier gas source 22a, and a carrier gas (diluted).
- the raw material solution 24a is housed in the mist source 24.
- the substrate 20 is installed on the hot plate 28, and the hot plate 28 is operated to raise the temperature in the film forming chamber 30.
- the flow rate control valves 23 (23a, 23b) are opened to supply the carrier gas into the film forming chamber 30 from the carrier gas source 22 (22a, 22b), and the atmosphere of the film forming chamber 30 is sufficiently replaced with the carrier gas. After that, the flow rate of the carrier gas and the flow rate of the carrier gas (dilution) are adjusted respectively.
- the ultrasonic vibrator 26 is vibrated and the vibration is propagated to the raw material solution 24a through the water 25a to atomize the raw material solution 24a and generate atomized droplets 24b.
- the atomized droplets 24b are introduced into the film forming chamber 30 by a carrier gas and transported to the substrate 20, and the atomized droplets 24b thermally react in the film forming chamber 30 under atmospheric pressure to cause a thermal reaction on the substrate 20. A film is formed on the 20.
- the film obtained in the film forming step may be used as it is in the semiconductor device, or may be used in the semiconductor device after using a known method such as peeling from the substrate or the like. May be good.
- the semiconductor device includes a semiconductor layer and a substrate, and the high resistance oxide film is arranged between the semiconductor layer and the substrate. According to such a preferable semiconductor device, a horizontal semiconductor device having more excellent electrical characteristics can be obtained, and it can be more preferably used as a power device. Further, the semiconductor device preferably has an opening in the high resistance oxide film and is preferably a vertical device. According to such a preferable semiconductor device, high withstand voltage and large current can be realized. It is possible to obtain a horizontal semiconductor device having more excellent electrical characteristics, and it can be more preferably used as a power device.
- the semiconductor device is particularly useful for power devices.
- Examples of the semiconductor device include transistors and the like, and MOSFETs are particularly preferable. Further, it is preferable that the semiconductor device is normally off.
- the transistor examples include a semiconductor device including at least a high resistance oxide film, a gate insulating film, a gate electrode, a source electrode and a drain electrode.
- the high resistance oxide film may be used as the semiconductor layer.
- the semiconductor device preferably includes a channel forming region, and more preferably includes an inverted channel forming region.
- the inverted channel forming region is usually provided between semiconductor regions exhibiting different types of conductivity.
- the inverting channel forming region is usually provided in the p-type semiconductor layer, it is usually provided in the p-type semiconductor layer between the semiconductor regions made of n-type semiconductors, and the inverting channel forming region is provided.
- it is usually provided in the n-type semiconductor layer between the semiconductor regions made of p-type semiconductors.
- the method for forming each semiconductor region may be the same as the method for forming the high resistance oxide film described above.
- an oxide film containing at least one element of Group 15 of the periodic table is laminated on the inverted channel forming region.
- the element include nitrogen (N) and phosphorus (P), but in the embodiment of the present invention, nitrogen (N) or phosphorus (P) is preferable, and phosphorus (P) is more preferable.
- the oxide film contains at least one of the elements of Group 15 of the Periodic Table and one or more metals of Group 13 of the Periodic Table.
- the metal include aluminum (Al), gallium (Ga), indium (In), and the like. Among them, Ga and / or Al are preferable, and Ga is more preferable.
- the oxide film is preferably a thin film, more preferably 100 nm or less in thickness, and most preferably 50 nm or less in thickness. By laminating such an oxide film, gate leakage can be suppressed more effectively, and semiconductor characteristics can be made more excellent.
- Examples of the method for forming the oxide film include known methods, and more specific examples thereof include a dry method and a wet method. In the surface treatment on the inverted channel region with phosphoric acid or the like. It is preferable to have it.
- the gate electrode is provided on the inverted channel forming region via the gate insulating film, but the gate is provided on the inverted channel forming region and the oxide film. It is also preferable that the gate electrode is provided via the insulating film, and with such a configuration, it becomes easy to prevent the diffusion of hydrogen and the like, and better semiconductor characteristics can be realized.
- the gate insulating film is not particularly limited as long as it does not interfere with the object of the present invention, and may be a known insulating film.
- the gate insulating film contains, for example, SiO 2 , Si 3 N 4 , Al 2 O 3 , GaO, AlGaO, InAlGaO, AlInZnGaO 4 , AlN, Hf 2 O 3 , SiN, SiON, MgO, GdO, and phosphorus.
- An oxide film such as an oxide film is a preferable example.
- the gate insulating film may be formed by a known method, and examples of such a known forming method include a dry method and a wet method. Examples of the dry method include known methods such as sputtering, vacuum deposition, CVD, and PLD. Examples of the wet method include a coating method such as screen printing and die coating.
- the gate electrode may be a known gate electrode, and the electrode material may be a conductive inorganic material or a conductive organic material.
- the electrode material is a metal.
- the metal is not particularly limited, but preferably, for example, at least one metal selected from the 4th to 11th groups of the periodic table can be mentioned.
- the metal of Group 4 of the periodic table include titanium (Ti), zirconium (Zr), hafnium (Hf), and the like, and Ti is preferable.
- Examples of the metal of Group 5 of the periodic table include vanadium (V), niobium (Nb), and tantalum (Ta).
- Examples of the metal of Group 6 of the periodic table include one or more metals selected from chromium (Cr), molybdenum (Mo), tungsten (W), and the like. In, Cr is preferable because semiconductor characteristics such as switching characteristics become better.
- Examples of the metal of Group 7 of the periodic table include manganese (Mn), technetium (Tc), and rhenium (Re).
- Examples of the metal of Group 8 of the periodic table include iron (Fe), ruthenium (Ru), and osmium (Os).
- Examples of the metal of Group 9 of the periodic table include cobalt (Co), rhodium (Rh), and iridium (Ir).
- Examples of the metal of Group 10 of the periodic table include nickel (Ni), palladium (Pd), platinum (Pt), and the like, and Pt is preferable.
- Examples of the metal of Group 11 of the periodic table include copper (Cu), silver (Ag), and gold (Au).
- Examples of the method for forming the gate electrode include known methods, and more specifically, examples include a dry method and a wet method. Examples of the dry method include known methods such as sputtering, vacuum vapor deposition, and CVD. Examples of the wet method include screen printing and die coating.
- the gate electrode not only the gate electrode but also the source electrode and the drain electrode are usually provided, but the source electrode and the drain electrode are all known electrodes like the gate electrode.
- the electrode forming method may be a known method.
- MOSFET MOSFET
- FIG. 2 is a horizontal MOSFET, which includes an n + type semiconductor layer (n + type source layer) 1b, an n + type semiconductor layer (n + type drain layer) 1c, a high resistance oxide film 2 as a p-type semiconductor layer, and a gate. It includes an insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9.
- FIG. 2A is a top view of the MOSFET as viewed from the zenith direction, and schematically shows the top surface of the MOSFET.
- FIG. 2B schematically shows a cross section of the MOSFET between A and A'in FIG. 2A.
- FIG. 3A is a top view of the MOSFET as viewed from the zenith direction, and schematically shows the top surface of the MOSFET.
- FIG. 3B schematically shows a cross section of the MOSFET of FIG. 3A.
- the MOSFET in FIG. 3 is a horizontal MOSFET, which has an n + type semiconductor layer 1, an n ⁇ type semiconductor layer 3, an n + type semiconductor layer (n + type source layer) 1b, an n + type semiconductor layer (n + type drain layer) 1c, and a high height.
- It includes a resistive oxide film 2, a gate insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9.
- a resistive oxide film 2 When a voltage is applied between the source electrode 5b and the drain electrode 5c and a positive voltage is applied to the gate electrode 5a with respect to the source electrode 135b, an n + type semiconductor layer is formed.
- a channel layer is formed between the (n + type source layer) 1b and the n + type semiconductor layer (n + type drain layer) 1c, and turns on.
- the current is induced by the high resistance oxide film 3 so as to suppress the leak current and the like. Further, in the off state, by setting the voltage of the gate electrode to 0V, the channel layer cannot be formed and the turn-off occurs.
- the MOSFET in FIG. 4 is a horizontal MOSFET, which has an n + type semiconductor layer 1, an n ⁇ type semiconductor layer 3, an n + type semiconductor layer (n + type source layer) 1b, an n + type semiconductor layer (n + type drain layer) 1c, and a high height. It includes a resistive oxide film 2, a gate insulating film 4a, a gate electrode 5a, a source electrode 5b, a drain electrode 5c, and a substrate 9. Compared to the MOSFET of FIG. 3, the MOSFET of FIG.
- n + type semiconductor layer (n + type drain layer) 1c in a mesa shape and has a stepped structure.
- the gate electrode side is low and the drain electrode side is high. With such a configuration, it is possible to realize a semiconductor device having a higher withstand voltage.
- FIG. 5A is a top view of the MOSFET as viewed from the zenith direction, and schematically shows the top surface of the MOSFET.
- FIG. 5 (b) schematically shows a cross section of the MOSFET between BB'in FIG. 5 (a).
- the MOSFET in FIG. 5 is a vertical MOSFET, and is a semiconductor device capable of realizing a higher withstand voltage and a larger current. Further, the MOSFET of FIG.
- the high resistance oxide film 2 has an opening below the gate electrode. When the width of the opening is wider than that of the gate electrode, the on-resistance can be further lowered, and when the width is narrower than that of the gate electrode, the withstand voltage can be further improved.
- the opening can be formed by etching or the like using a known method.
- an opening may be formed by etching or the like, or after forming an n-type semiconductor layer, the opening becomes an opening.
- a high resistance oxide film may be formed in place by using a mask, and then the mask may be removed.
- An example of a high resistance oxide film having an opening formed by the latter method is shown in FIG.
- the MOSFET of FIG. 6 shows an example of the case where the position of the opening is provided in the n-type semiconductor layer on the gate electrode side with the MOSFET of FIG.
- any MOSFET of the MOSFET of FIG. 5 and the MOSFET of FIG. 6 can be preferably used.
- the semiconductor device of the present invention is suitably used as a power module, an inverter or a converter by using a known method, and further preferably used for a semiconductor system using a power supply device, for example. ..
- the power supply device can be manufactured from or as the semiconductor device by connecting to a wiring pattern or the like using a known method.
- FIG. 8 shows an example of a power supply system.
- FIG. 8 shows a power supply system 170 configured by using the plurality of power supply devices 171 and 172 and a control circuit 173.
- the power supply system 170 can be used in the system apparatus 180 by combining the electronic circuit 181 and the power supply system 182 (that is, the power supply system 170 in FIG. 8).
- FIG. 10 shows a power supply circuit of a power supply device including a power circuit and a control circuit.
- the DC voltage is switched at a high frequency by an inverter 192 (composed of MOSFETs: A to D), converted to AC, and then insulated by a transformer 193. Transformers are performed, rectified by rectifying MOSFETs (A to B'), smoothed by DCL195 (smoothing coils L1 and L2) and capacitors, and a DC voltage is output.
- the voltage comparator 197 compares the output voltage with the reference voltage, and the PWM control circuit 196 controls the inverter 192 and the rectifier MOSFET 194 so as to obtain a desired output voltage.
- Example 1 Fabrication of MOSFET shown in FIG. 2. Formation of p-type semiconductor layer (high resistance oxide film) 1-1. Film forming apparatus The film forming apparatus 19 of FIG. 1 was used.
- Preparation for film formation 1-2 The raw material solution 24a obtained in 1) was housed in the mist generation source 24. Next, as the substrate 20, a sapphire substrate was placed on the susceptor 21, and the heater 28 was operated to raise the temperature inside the film forming chamber 30 to 520 ° C. Next, the flow control valves 23a and 23b are opened to supply the carrier gas into the film forming chamber 30 from the carrier gas supply sources 22a and 22b which are the carrier gas sources, and the atmosphere of the film forming chamber 30 is sufficiently filled with the carrier gas. After the replacement, the flow rate of the carrier gas was adjusted to 1 LPM, and the flow rate of the carrier gas (dilution) was adjusted to 1 LPM. Nitrogen was used as the carrier gas.
- the ultrasonic vibrator 26 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 24a through water 25a to atomize the raw material solution 24a to generate mist.
- This mist is introduced into the film forming chamber 30 by a carrier gas, and the mist reacts in the film forming chamber 30 at 520 ° C. under atmospheric pressure to form a p-type semiconductor layer (high resistance oxide) on the substrate 20.
- Membrane was formed.
- the film thickness was 0.6 ⁇ m, and the film formation time was 15 minutes.
- n + type semiconductor region A 0.1 M gallium bromide aqueous solution was contained with 10% hydrobromic acid and 8% tin bromide in volume ratio, respectively, and this was used as a raw material solution, and the film formation temperature was 580 ° C. Except for the fact that the film formation time was 5 minutes, the above 1. In the same manner as in 1. above. An n + type semiconductor film was formed on the p-type semiconductor layer obtained in 1. When the phase of the obtained film was identified using an XRD diffractometer, the obtained crystalline oxide semiconductor film was ⁇ -Ga 2 O 3 , and the band gap was 3 eV or more. ..
- the semiconductor device of the present invention can be used in all fields such as semiconductors (for example, compound semiconductor electronic devices, etc.), electronic parts / electrical equipment parts, optical / electrophotographic related devices, industrial parts, etc., but is particularly useful for power devices. is there.
- n + type semiconductor layer 1 b n + type semiconductor layer (n + type source layer) 1c n + type semiconductor layer (n + type drain layer) 2 High resistance oxide film 3 n-type semiconductor layer 4a Gate insulating film 5a Gate electrode 5b Source electrode 5c Drain electrode 9 Substrate 19 Mist CVD equipment 20 Substrate 21 Suceptor 22a Carrier gas supply source 22b Carrier gas (diluted) supply source 23a Flow rate Control valve 23b Flow control valve 24 Mist source 24a Raw material solution 25 Container 25a Water 26 Ultrasonic transducer 27 Supply pipe 28 Heater 29 Exhaust port 170 Power supply system 171 Power supply device 172 Power supply device 173 Control circuit 180 System device 181 Electronic circuit 182 Power supply System 192 Inverter 193 Transformer 194 rectifying MOSFET 195 DCL 196 PWM control circuit 197 Voltage comparator
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Abstract
Description
ところで、トランジスタ等のパワーデバイスにおいては、低いオン抵抗と高い耐圧とが求められるが、リーク電流等の電気特性においてなお課題があった。特に、酸化ガリウム(Ga2O3)では、絶縁破壊電界強度が10程度あり、オン抵抗も低く、優れた半導体特性を有しているが、電気特性に課題があることにより、これら半導体特性を十分に発揮できないといった問題があった。また、バンドギャップ3eV以上の酸化物半導体も同様の問題があった。具体的には、イオン注入で生じやすくなる接合リーク電流が、酸化物半導体にとって電気特性に悪影響を与える問題等があり、そのため、このような電気特性等の問題を解決して、酸化ガリウム(Ga2O3)等の優れた半導体材料を効果的に用いた、高耐圧、低損失および高耐熱を実現できる半導体装置が待ち望まれていた。
また、本発明者らは、上記知見を得た後、さらに検討を重ねて本発明を完成させるに至った。
[1] 結晶性酸化物半導体層を少なくとも有する半導体装置であって、前記結晶性酸化物半導体層のバンドギャップが3eV以上であり、電界効果移動度が30cm2/V・s以上であることを特徴とする半導体装置。
[2] 前記電界効果移動度が60cm2/V・s以上である前記[1]記載の半導体装置。
[3] 前記結晶性酸化物半導体層が、p型ドーパントを含む前記[1]または[2]に記載の半導体装置。
[4] 前記結晶性酸化物半導体層に、さらに高抵抗酸化物膜が配置されており、前記高抵抗酸化物膜の抵抗が1.0×106Ω・cm以上である前記[1]~[3]のいずれかに記載の半導体装置。
[5] 前記高抵抗酸化物膜の抵抗が1.0×1010Ω・cm以上である前記[4]記載の半導体装置。
[6] さらに、チャネル形成領域を含んでおり、前記チャネル形成領域下に、前記高抵抗酸化物膜が配置されている前記[4]または[5]に記載の半導体装置。
[7] 前記高抵抗酸化物膜が電流ブロック層である前記[4]~[6]のいずれかに記載の半導体装置。
[8] 前記結晶性酸化物半導体層がコランダム構造を有する前記[1]~[7]のいずれかに記載の半導体装置。
[9] 前記結晶性酸化物半導体層がGa2O3を含む、前記[1]~[8]のいずれかに記載の半導体装置。
[10] 縦型デバイスである前記[1]~[9]のいずれかに記載の半導体装置。
[11] パワーデバイスである、前記[1]~[10]のいずれかに記載の半導体装置。
[12] MOSFETである前記[1]~[11]のいずれかに記載の半導体装置。
[13] オン/オフ比が1000以上である前記[1]~[12]のいずれかに記載の半導体装置。
[14] ノーマリーオフである前記[1]~[13]のいずれかに記載の半導体装置。
[15] 半導体装置を備える半導体システムであって、前記半導体装置が、前記[1]~[14]のいずれかに記載の半導体装置である半導体システム。
原料溶液は、成膜原料として金属を含んでおり、霧化可能であれば特に限定されず、無機材料を含んでいてもよいし、有機材料を含んでいてもよい。前記金属は、金属単体であっても、金属化合物であってもよく、本発明の目的を阻害しない限り特に限定されないが、ガリウム(Ga)、イリジウム(Ir)、インジウム(In)、ロジウム(Rh)、アルミニウム(Al)、金(Au)、銀(Ag)、白金(Pt)、銅(Cu)、鉄(Fe)、マンガン(Mn)、ニッケル(Ni)、パラジウム(Pd)、コバルト(Co)、ルテニウム(Ru)、クロム(Cr)、モリブデン(Mo)、タングステン(W)、タンタル(Ta)、亜鉛(Zn)、鉛(Pb)、レニウム(Re)、チタン(Ti)、スズ(Sn)、ガリウム(Ga)、マグネシウム(Mg)、カルシウム(Ca)およびジルコニウム(Zr)から選ばれる1種または2種以上の金属などが挙げられるが、本発明の実施態様においては、前記金属が、少なくとも周期律表第4周期~第6周期の1種または2種以上の金属を含むのが好ましく、少なくともガリウム、インジウム、アルミニウム、ロジウムまたはイリジウムを含むのがより好ましく、少なくともガリウムを含むのが最も好ましい。このような好ましい金属を用いることにより、半導体装置等により好適に用いることができるエピタキシャル膜を成膜することができる。
前記霧化工程は、金属を含む原料溶液を調整し、前記原料溶液を霧化し、霧化液滴を発生させる。前記金属の配合割合は、特に限定されないが、原料溶液全体に対して、0.0001mol/L~20mol/Lが好ましい。霧化方法は、前記原料溶液を霧化できさえすれば特に限定されず、公知の霧化方法であってよいが、本発明の実施態様においては、超音波振動を用いる霧化方法であるのが好ましい。本発明で用いられる霧化液滴(例えばミスト等)は、空中に浮遊するものであり、例えば、スプレーのように吹き付けるのではなく、初速度がゼロで、空間に浮遊して搬送することが可能な霧化液滴であるのがより好ましい。霧化液滴の液滴サイズは、特に限定されず、数mm程度の液滴であってもよいが、好ましくは50μm以下であり、より好ましくは1~10μmである。
前記搬送工程では、前記キャリアガスによって前記霧化液滴を前記基体へ搬送する。キャリアガスの種類としては、本発明の目的を阻害しない限り特に限定されず、例えば、酸素、オゾン、不活性ガス(例えば窒素やアルゴン等)、または還元ガス(水素ガスやフォーミングガス等)などが好適な例として挙げられる。また、キャリアガスの種類は1種類であってよいが、2種類以上であってもよく、キャリアガス濃度を変化させた希釈ガス(例えば10倍希釈ガス等)などを、第2のキャリアガスとしてさらに用いてもよい。また、キャリアガスの供給箇所も1箇所だけでなく、2箇所以上あってもよい。キャリアガスの流量は、特に限定されないが、好ましくは0.01~20LPMであり、より好ましくは0.1~10LPMである。
成膜工程では、前記霧化液滴を反応させて、前記基体上に成膜する。前記反応は、前記霧化液滴から膜が形成される反応であれば特に限定されないが、本発明の実施態様においては、熱反応が好ましい。前記熱反応は、熱でもって前記霧化液滴が反応すればそれでよく、反応条件等も本発明の目的を阻害しない限り特に限定されない。本工程においては、前記熱反応を、通常、原料溶液の溶媒の蒸発温度以上の温度で行うが、高すぎない温度以下が好ましく、850℃以下がより好ましく、650℃以下が最も好ましい。また、熱反応は、本発明の目的を阻害しない限り、真空下、非酸素雰囲気下、還元ガス雰囲気下および酸素雰囲気下のいずれの雰囲気下で行われてもよく、また、大気圧下、加圧下および減圧下のいずれの条件下で行われてもよいが、本発明の実施態様においては、大気圧下で行われるのが蒸発温度の計算がより簡単になり、設備等も簡素化できる等の点で好ましい。また、膜厚は成膜時間を調整することにより、設定することができる。
前記基体は、前記膜を支持できるものであれば特に限定されない。前記基体の材料も、本発明の目的を阻害しない限り特に限定されず、公知の基体であってよく、有機化合物であってもよいし、無機化合物であってもよい。前記基体の形状としては、どのような形状のものであってもよく、あらゆる形状に対して有効であり、例えば、平板や円板等の板状、繊維状、棒状、円柱状、角柱状、筒状、螺旋状、球状、リング状などが挙げられるが、本発明の実施態様においては、基板が好ましい。基板の厚さは、本発明の実施態様においては特に限定されない。
前記半導体装置は、半導体層および基板を備え、前記半導体層と前記基板との間に前記高抵抗酸化物膜が配置されているのが好ましい。このような好ましい半導体装置によれば、より電気特性に優れた横型の半導体装置を得ることができ、パワーデバイスとしてより好適に用いることができる。
また、前記半導体装置は、前記高抵抗酸化物膜が開口部を有しており、縦型デバイスであるのも好ましく、このような好ましい半導体装置によれば、高耐圧かつ大電流化を実現し得る、より電気特性に優れた横型の半導体装置を得ることができ、パワーデバイスとしてより好適に用いることができる。
本発明の半導体装置の具体的な一例としては、例えば図2に示すMOSFETなどが挙げられる。図2のMOSFETは、横型のMOSFETであり、n+型半導体層(n+型ソース層)1b、n+型半導体層(n+型ドレイン層)1c、p型半導体層としての高抵抗酸化物膜2、ゲート絶縁膜4a、ゲート電極5a、ソース電極5b、ドレイン電極5cおよび基板9を備えている。なお、図2(a)はMOSFETを天頂方向から見た上面図となっており、MOSFETの上面を模式的に示している。また、図2(b)は図2(a)のA-A’間のMOSFETの断面を模式的に示している。
1.p型半導体層(高抵抗酸化物膜)の形成
1-1.成膜装置
図1の成膜装置19を用いた。
0.1M臭化ガリウム水溶液に臭化水素酸を体積比で20%含有させ、さらにMgを10体積%の割合で加え、これを原料溶液とした。
上記1-2.で得られた原料溶液24aをミスト発生源24内に収容した。次に、基板20として、サファイア基板をサセプタ21上に設置し、ヒーター28を作動させて成膜室30内の温度を520℃にまで昇温させた。次に、流量調節弁23a、23bを開いて、キャリアガス源であるキャリアガス供給源22a、22bからキャリアガスを成膜室30内に供給し、成膜室30の雰囲気をキャリアガスで十分に置換した後、キャリアガスの流量を1LPMに、キャリアガス(希釈)の流量を1LPMにそれぞれ調節した。なお、キャリアガスとして窒素を用いた。
次に、超音波振動子26を2.4MHzで振動させ、その振動を、水25aを通じて原料溶液24aに伝播させることによって、原料溶液24aを霧化させてミストを生成した。このミストが、キャリアガスによって成膜室30内に導入され、大気圧下、520℃にて、成膜室30内でミストが反応して、基板20上にp型半導体層(高抵抗酸化物膜)が形成された。なお、膜厚は0.6μmであり、成膜時間は15分間であった。
XRD回折装置を用いて、上記1-4.にて得られた膜の相の同定を行ったところ、得られた膜はα-Ga2O3であった。
0.1M臭化ガリウム水溶液に体積比で臭化水素酸10%および臭化スズ8%をそれぞれ含有させ、これを原料溶液としたこと、ならびに成膜温度を580℃および成膜時間を5分間としたこと以外、上記1.と同様にして、上記1.で得られたp型半導体層上にn+型半導体膜を成膜した。得られた膜につき、XRD回折装置を用いて、膜の相の同定を行ったところ、得られた結晶性酸化物半導体膜はα-Ga2O3であり、バンドギャップが3eV以上であった。
ゲート部に対応する領域(1bと1cとの間)のn+型半導体層をリン酸でエッチングし、さらに、p型半導体層上にリンを少なくとも含む酸化膜が形成されるようにリン酸で処理した後、TEOSを用いてゲート絶縁膜としてSiO2を成膜した。なお、高抵抗酸化物膜の抵抗は、高抵抗酸化物膜に測定用の電極を形成して電流を流して測定したところ、1.0×1012Ω・cm以上であった。また、フォトリソグラフィー、エッチング処理、電子ビーム蒸着処理等に付し、図2に示すとおり、MOSFETを作製した。なお、電極にはいずれもTiを用いた。
得られたMOSFETにつき、IV測定を実施した。IV測定結果を図7に示す。図7から明らかなとおり、反転チャネル領域が形成され、高移動度の酸化ガリウム半導体のMOSFETの創製に成功し、トランジスタとして良好に動作することも実証した。なお、図7よりId-Vg特性(Vd=10V)を評価したところ、電界効果移動度(Vgが20Vの時)は、それぞれ62.52cm2/V・s、116.9cm2/V・sおよび54.55cm2/V・sであり、また、電界効果移動度(Vgが14Vの時)が、102.5cm2/V・s、131.6cm2/V・sおよび36.85cm2/V・sであった。また、得られたIV特性から求められたゲート電圧閾値電圧は、7V以上であった。また、オン/オフ比は、10000000であった。
1b n+型半導体層(n+型ソース層)
1c n+型半導体層(n+型ドレイン層)
2 高抵抗酸化物膜
3 n-型半導体層
4a ゲート絶縁膜
5a ゲート電極
5b ソース電極
5c ドレイン電極
9 基板
19 ミストCVD装置
20 基板
21 サセプタ
22a キャリアガス供給源
22b キャリアガス(希釈)供給源
23a 流量調節弁
23b 流量調節弁
24 ミスト発生源
24a 原料溶液
25 容器
25a 水
26 超音波振動子
27 供給管
28 ヒーター
29 排気口
170 電源システム
171 電源装置
172 電源装置
173 制御回路
180 システム装置
181 電子回路
182 電源システム
192 インバータ
193 トランス
194 整流MOSFET
195 DCL
196 PWM制御回路
197 電圧比較器
Claims (15)
- 結晶性酸化物半導体層を少なくとも有する半導体装置であって、前記結晶性酸化物半導体層のバンドギャップが3eV以上であり、電界効果移動度が30cm2/V・s以上であることを特徴とする半導体装置。
- 前記電界効果移動度が60cm2/V・s以上である請求項1記載の半導体装置。
- 前記結晶性酸化物半導体層が、p型ドーパントを含む請求項1または2に記載の半導体装置。
- 前記結晶性酸化物半導体層に、さらに高抵抗酸化物膜が配置されており、前記高抵抗酸化物膜の抵抗が1.0×106Ω・cm以上である請求項1~3のいずれかに記載の半導体装置。
- 前記高抵抗酸化物膜の抵抗が1.0×1010Ω・cm以上である請求項4記載の半導体装置。
- さらに、チャネル形成領域を含んでおり、前記チャネル形成領域下に、前記高抵抗酸化物膜が配置されている請求項4または5に記載の半導体装置。
- 前記高抵抗酸化物膜が電流ブロック層である請求項4~6のいずれかに記載の半導体装置。
- 前記結晶性酸化物半導体層がコランダム構造を有する請求項1~7のいずれかに記載の半導体装置。
- 前記結晶性酸化物半導体層がGa2O3を含む、請求項1~8のいずれかに記載の半導体装置。
- 縦型デバイスである請求項1~9のいずれかに記載の半導体装置。
- パワーデバイスである、請求項1~10のいずれかに記載の半導体装置。
- MOSFETである請求項1~11のいずれかに記載の半導体装置。
- オン/オフ比が1000以上である請求項1~12のいずれかに記載の半導体装置。
- ノーマリーオフである請求項1~13のいずれかに記載の半導体装置。
- 半導体装置を備える半導体システムであって、前記半導体装置が、請求項1~14のいずれかに記載の半導体装置である半導体システム。
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KENTARO KANEKO: "Dissertation", March 2013, KYOTO UNIV, article "Fabrication and physical properties of corundum structured alloys based on gallium oxide" |
See also references of EP4068389A4 |
TATSUYA TAKEMOTO: "Thermal Conductivity, p-type ...... Overcoming Problems and Putting It into Practical Use", 27 February 2014, ITMEDIA, INC., article "Power Semiconductor Gallium Oxide" |
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Publication number | Publication date |
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KR20220106816A (ko) | 2022-07-29 |
JPWO2021106810A1 (ja) | 2021-06-03 |
EP4068389A1 (en) | 2022-10-05 |
EP4068389A4 (en) | 2024-01-03 |
CN114762129A (zh) | 2022-07-15 |
TW202135316A (zh) | 2021-09-16 |
US20220285557A1 (en) | 2022-09-08 |
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