JPWO2018163913A1 - コンタクトパッドの製造方法及びこれを用いた半導体装置の製造方法、並びに半導体装置 - Google Patents
コンタクトパッドの製造方法及びこれを用いた半導体装置の製造方法、並びに半導体装置 Download PDFInfo
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- JPWO2018163913A1 JPWO2018163913A1 JP2019504496A JP2019504496A JPWO2018163913A1 JP WO2018163913 A1 JPWO2018163913 A1 JP WO2018163913A1 JP 2019504496 A JP2019504496 A JP 2019504496A JP 2019504496 A JP2019504496 A JP 2019504496A JP WO2018163913 A1 JPWO2018163913 A1 JP WO2018163913A1
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- 239000004065 semiconductor Substances 0.000 title claims description 98
- 238000004519 manufacturing process Methods 0.000 title claims description 87
- 239000003054 catalyst Substances 0.000 claims abstract description 61
- 238000007772 electroless plating Methods 0.000 claims abstract description 57
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims description 116
- 238000005530 etching Methods 0.000 claims description 49
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 39
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 33
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 33
- 125000006850 spacer group Chemical group 0.000 claims description 30
- 239000007788 liquid Substances 0.000 claims description 23
- 229910052763 palladium Inorganic materials 0.000 claims description 22
- 229910052710 silicon Inorganic materials 0.000 claims description 19
- 239000010703 silicon Substances 0.000 claims description 17
- 239000004020 conductor Substances 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- 239000007769 metal material Substances 0.000 claims description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 13
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 10
- 229910017052 cobalt Inorganic materials 0.000 claims description 9
- 239000010941 cobalt Substances 0.000 claims description 9
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 9
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 9
- 229910052721 tungsten Inorganic materials 0.000 claims description 9
- 239000010937 tungsten Substances 0.000 claims description 9
- 229910052759 nickel Inorganic materials 0.000 claims description 8
- 229910052707 ruthenium Inorganic materials 0.000 claims description 8
- 239000002105 nanoparticle Substances 0.000 claims description 7
- XEEYBQQBJWHFJM-UHFFFAOYSA-N iron Substances [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 6
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 5
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 4
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 229910052741 iridium Inorganic materials 0.000 claims description 4
- 229910052742 iron Inorganic materials 0.000 claims description 4
- 229910052762 osmium Inorganic materials 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910052703 rhodium Inorganic materials 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 238000001039 wet etching Methods 0.000 claims description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 164
- 238000010586 diagram Methods 0.000 description 24
- 239000000243 solution Substances 0.000 description 22
- 229910004298 SiO 2 Inorganic materials 0.000 description 15
- 239000000758 substrate Substances 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- 238000005229 chemical vapour deposition Methods 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 8
- 238000000231 atomic layer deposition Methods 0.000 description 7
- 238000007747 plating Methods 0.000 description 7
- 230000003197 catalytic effect Effects 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 239000003638 chemical reducing agent Substances 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 229910021645 metal ion Inorganic materials 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 238000006467 substitution reaction Methods 0.000 description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 229910001361 White metal Inorganic materials 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 239000010969 white metal Substances 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- -1 palladium ions Chemical class 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/18—Pretreatment of the material to be coated
- C23C18/1851—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material
- C23C18/1872—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material by chemical pretreatment
- C23C18/1875—Pretreatment of the material to be coated of surfaces of non-metallic or semiconducting in organic material by chemical pretreatment only one step pretreatment
- C23C18/1879—Use of metal, e.g. activation, sensitisation with noble metals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76874—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroless plating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
-
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- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/1601—Process or apparatus
- C23C18/1603—Process or apparatus coating on selected surface areas
- C23C18/1605—Process or apparatus coating on selected surface areas by masking
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/31—Coating with metals
- C23C18/32—Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/31—Coating with metals
- C23C18/42—Coating with noble metals
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
- C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
- C23C18/52—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating using reducing agents for coating with metallic material not provided for in a single one of groups C23C18/32 - C23C18/50
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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Abstract
Description
該触媒処理が施された前記配線層の上面に無電解めっきを行い、金属層を選択成長させる工程と、を有する。
図1は、本開示の第1の実施形態に係る半導体装置の一例を示した図である。第1の実施形態に係る半導体装置は、基板10と、ストップレイヤー20と、絶縁層30と、配線層40と、スペーサ70と、コンタクトパッド90と、絶縁膜100と、コンタクトホール110と、コンタクトプラグ120とを有する。
図7乃至図13を参照して、本開示の第2の実施形態に係る半導体装置の製造方法及びこれに含まれるコンタクトパッドの製造方法について説明する。なお、第2の実施形態において、第1の実施形態と重複又は類似する箇所は、適宜説明を省略する。また、第1の実施形態の構成要素に対応する構成要素については、同一の参照符号を付してその説明を省略する。
次に、第3の実施形態に係る半導体装置の製造方法について説明する。第3の実施形態に係る半導体装置の製造方法は、第2の実施形態に係る半導体装置の製造方法と同様に、配線層45を窒化シリコン膜で構成し、コンタクトパッド95を形成するまでは、第2の実施形態に係る半導体装置の製造方法と同様であるので、その説明を省略し、異なる工程についてのみ説明する。
20 ストップレイヤー
30 絶縁層
40、45、47、49 配線層
46、48 空間
50、55 ペア層
60、65 構造体
70 スペーサ
71 酸化膜
80、85 触媒液
90、95 コンタクトパッド
100 絶縁膜
110 コンタクトホール
120 コンタクトプラグ
Claims (31)
- 絶縁層上に配線層が形成されたペア層が階段形状をなして積層され、前記階段形状のステップ部分をなす露出した前記配線層の上面に触媒液を供給して選択的に触媒処理を施す工程と、
該触媒処理が施された前記配線層の上面に無電解めっきを行い、金属層を選択成長させる工程と、を有するコンタクトパッドの製造方法。 - 前記金属層は、エッチングによりパンチスルーが生じない所定厚さに形成されることを特徴とする請求項1に記載のコンタクトパッドの製造方法。
- 前記配線層は、シリコン又は窒化シリコンからなる請求項1に記載のコンタクトパッドの製造方法。
- 前記階段形状の段差部分をなす前記ペア層の側面が、絶縁膜のスペーサに予め覆われている請求項3に記載のコンタクトパッドの製造方法。
- 前記触媒液は、シリコン又は窒化シリコンには吸着するが、前記絶縁膜には吸着しない金属元素を含む請求項4に記載のコンタクトパッドの製造方法。
- 前記触媒液に含まれる前記金属元素は、Fe、Co、Ni、Ru、Rh、Pd、Os、Ir、Pt、Cu、Ag又はAuのいずれかである請求項5に記載のコンタクトパッドの製造方法。
- 前記触媒液に含まれる前記金属元素はパラジウムであり、
前記配線層がシリコンからなるときには、パラジウムをイオン状態で含むイオンパラジウム溶液が前記触媒液として用いられ、
前記配線層が窒化シリコンからなるときには、パラジウムをナノ粒子状態で含むナノパラジウム溶液が前記触媒液として用いられる請求項6に記載のコンタクトパッドの製造方法。 - 前記触媒液には、フッ化水素が含まれている請求項3に記載のコンタクトパッドの製造方法。
- 前記絶縁膜及び前記スペーサは、シリコン酸化膜からなる請求項4に記載のコンタクトパッドの製造方法。
- 前記無電解めっきは、コバルト、ニッケル、ルテニウム、アルミニウムのいずれかを含む無電解めっき液を用いて行われる請求項1に記載のコンタクトパッドの製造方法。
- 絶縁層上に配線層が形成されたペア層が階段形状をなして積層され、前記階段形状のステップ部分をなす前記配線層の上面が露出した構造体の表面上に、前記階段形状に沿った第1の絶縁膜を形成する工程と、
露出した前記配線層の上面上の前記第1の絶縁膜を除去し、前記階段形状の段差部分をなす側面を覆う前記第1の絶縁膜のみを残してスペーサを形成する工程と、
露出した前記配線層の上面に触媒液を供給して選択的に触媒処理を施す工程と、
該触媒処理が施された前記配線層の上面に無電解めっきを行い、金属層を選択成長させてコンタクトパッドを形成する工程と、
前記構造体の表面上に、前記階段形状の最上段まで到達し、前記階段形状を充填する第2の絶縁膜を形成する工程と、を有する半導体装置の製造方法。 - 前記金属層は、エッチングによりパンチスルーが生じない所定厚さに形成される請求項11に記載の半導体装置の製造方法。
- 前記無電解めっきは、コバルト、ニッケル、ルテニウム、アルミニウムのいずれかを含む無電解めっき液を用いて行われる請求項11に記載の半導体装置の製造方法。
- 前記配線層は、シリコン又は窒化シリコンからなる請求項11に記載の半導体装置の製造方法。
- 前記触媒液は、シリコン又は窒化シリコンには吸着するが、前記第1の絶縁膜には吸着しない金属元素を含む請求項14に記載の半導体装置の製造方法。
- 前記絶縁層、前記第1及び第2の絶縁膜は、シリコン酸化膜からなる請求項15に記載の半導体装置の製造方法。
- 前記触媒液に含まれる前記金属元素は、Fe、Co、Ni、Ru、Rh、Pd、Os、Ir、Pt、Cu、Ag又はAuのいずれかである請求項16に記載の半導体装置の製造方法。
- 前記触媒液中には、フッ化水素が含まれている請求項17に記載の半導体装置の製造方法。
- 前記配線層がシリコンからなり、前記触媒液としてイオンパラジウム溶液が用いられる請求項14に記載の半導体装置の製造方法。
- 前記配線層が窒化シリコンからなり、前記触媒液としてナノパラジウム溶液が用いられる請求項14に記載の半導体装置の製造方法。
- 前記第2の絶縁膜を形成する工程の後、前記窒化シリコンを除去し、前記配線層の領域に空間を形成する工程と、
前記配線層の領域に形成された前記空間に導電性材料を充填する工程と、を更に有する請求項20に記載の半導体装置の製造方法。 - 前記窒化シリコンは、熱リン酸を用いたウェットエッチングにより除去される請求項21に記載の半導体装置の製造方法。
- 前記第2の絶縁膜を形成する工程の後、前記窒化シリコン及び前記金属層を除去し、前記配線層及び前記コンタクトパッドの領域に空間を形成する工程と、
前記配線層及び前記コンタクトパッドの領域に形成された前記空間に導電性材料を充填する工程と、を更に有する請求項20に記載の半導体装置の製造方法。 - 前記窒化シリコン及び前記金属層は、熱リン酸及び硫酸を用いたウェットエッチングにより除去される請求項23に記載の半導体装置の製造方法。
- 絶縁層上に配線層が形成されたペア層が階段形状をなして積層された構造体と、
前記階段形状の段差部分をなす側面を覆うように設けられた酸化膜からなるスペーサと、
前記階段形状のステップ部をなす前記配線層の上面を覆うように設けられた無電解めっき層からなるコンタクトパッドと、を有する半導体装置。 - 前記配線層と前記コンタクトパッドとは、異なる種類の導電材料からなる請求項25に記載の半導体装置。
- 前記配線層はシリコンからなり、前記コンタクトパッドは金属材料からなる請求項26に記載の半導体装置。
- 前記配線層はタングステンからなり、前記コンタクトパッドはタングステン以外の金属材料からなる請求項26に記載の半導体装置。
- 前記配線層と前記コンタクトパッドとは、同一種類の導電材料からなる請求項25に記載の半導体装置。
- 前記導電材料は、タングステンである請求項29に記載の半導体装置。
- 前記コンタクトパッドは、エッチングによりパンチスルーが発生しない所定厚さを有する請求項25に記載の半導体装置。
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