JPWO2017081798A1 - 半導体装置、半導体検出器並びにそれらの製造方法、半導体チップまたは基板 - Google Patents
半導体装置、半導体検出器並びにそれらの製造方法、半導体チップまたは基板 Download PDFInfo
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- JPWO2017081798A1 JPWO2017081798A1 JP2017549943A JP2017549943A JPWO2017081798A1 JP WO2017081798 A1 JPWO2017081798 A1 JP WO2017081798A1 JP 2017549943 A JP2017549943 A JP 2017549943A JP 2017549943 A JP2017549943 A JP 2017549943A JP WO2017081798 A1 JPWO2017081798 A1 JP WO2017081798A1
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Abstract
Description
本発明の好ましい実施形態による半導体装置は、一方の半導体チップまたは基板に第1の電極が形成され、他方の半導体チップまたは基板に前記第1の電極に対向する位置に第2の電極、および前記第2の電極の上に筒状電極が形成され、前記一方の半導体チップまたは基板の前記第1の電極と、前記他方の半導体チップまたは基板の前記筒状電極とが互いに機械的・電気的に接続されるよう構造されている。
11 … 画素電極
2 … 対向基板
33 … 対向画素電極
34 … ウォールバンプ電極
本発明の好ましい実施形態による半導体装置は、一方の半導体チップまたは基板に第1の電極が形成され、他方の半導体チップまたは基板に前記第1の電極に対向する位置に第2の電極、および前記第2の電極の上に筒状電極が形成され、前記一方の半導体チップまたは基板の前記第1の電極と、前記他方の半導体チップまたは基板の前記筒状電極とが互いに機械的・電気的に接続されるよう構造され、前記筒状電極は、前記第1の電極に接続される側の内径および外径が、前記第2の電極側の内径および外径に対して漸減するように内側に向けて湾曲した筒状であることにより、前記第1の電極に接続される側の先端がその全周にわたって内側に押しつぶされた形状で前記第1の電極に接続されている。
また、半導体装置、半導体チップまたは基板によれば、前記筒状電極は、前記第1の電極に接続される側の内径および外径が、前記第2の電極側の内径および外径に対して漸減するように内側に向けて湾曲した筒状である。第1の電極と筒状電極とが接続される際に、筒状電極の第1の電極に接続される側が内側に向けて若干押しつぶされるので、より確実に接触させることができる。
また、半導体装置の製造方法によれば、レジストを塗布する工程と、前記レジストに露光して開口部を形成する工程と、前記開口部に蒸着を行うことにより、前記開口部の底面に前記第2の電極となる部分が堆積され、前記開口部の内壁に前記筒状電極となる部分が堆積される工程と、前記レジストを除去する工程とを実行することにより、第2の電極および筒状電極が形成される。
Claims (12)
- 一方の半導体チップまたは基板に第1の電極が形成され、
他方の半導体チップまたは基板に前記第1の電極に対向する位置に第2の電極、および前記第2の電極の上に筒状電極が形成され、
前記一方の半導体チップまたは基板の前記第1の電極と、前記他方の半導体チップまたは基板の前記筒状電極とが互いに機械的・電気的に接続されるよう構造されている、半導体装置。 - 請求項1に記載の半導体装置において、
前記筒状電極は、前記第1の電極に接続される側の内径および外径が、前記第2の電極側の内径および外径に対して漸減するように内側に向けて湾曲した筒状である、半導体装置。 - 請求項1に記載の半導体装置において、
前記第2の電極および前記筒状電極が同一材料により一体形成されている、半導体装置。 - 請求項1に記載の半導体装置において、
1つの前記第1の電極に対応付けて、複数の前記第2の電極および前記筒状電極が形成される、半導体装置。 - 請求項1に記載の半導体装置において、
前記筒状電極の高さをt、前記筒状電極の径をdとしたとき、t/d≧1/2の条件を満足する、半導体装置。 - 請求項1から請求項5のいずれかに記載の半導体装置の構造を有し、
いずれか一方の前記半導体チップまたは基板が、光または放射線を検出し、検出されて得られた信号を、いずれか他方の前記半導体チップまたは基板から取り出すよう構造されている、半導体検出器。 - 一方の半導体チップまたは基板に形成された第1の電極に対向する位置に、他方の半導体チップまたは基板に第2の電極を形成する工程と、前記第2の電極の上に筒状電極を形成する工程とを含む筒状電極形成工程
を備える、半導体装置の製造方法。 - 請求項7に記載の半導体装置の製造方法において、
前記第2の電極を形成する工程および前記筒状電極を形成する工程は、
レジストを塗布する工程と、
前記レジストに露光して開口部を形成する工程と、
前記開口部に蒸着を行うことにより、前記開口部の底面に前記第2の電極となる部分が堆積され、前記開口部の内壁に前記筒状電極となる部分が堆積される工程と、
前記レジストを除去する工程とを含む、半導体装置の製造方法。 - 請求項8に記載の半導体装置の製造方法において、
前記開口部が、前記第1の電極に接続される側の径が、前記第2の電極側の径に対して漸減するように内側に向けて湾曲している、半導体装置の製造方法。 - 請求項7に記載の半導体装置の製造方法において、
前記一方の半導体チップまたは基板に前記第1の電極を形成する工程と、
前記一方の半導体チップまたは基板に形成された前記第1の電極と、前記他方の半導体チップまたは基板に形成された前記筒状電極とが互いに接触するように、両方の前記半導体チップまたは基板の各電極の位置合わせを行って貼り合わせる電極接触工程と、
前記第1の電極および前記筒状電極の少なくとも一方に、圧力、熱または超音波のエネルギーを加えることにより、両方の電極を互いに接合して機械的・電気的に接続する電極接合工程と
を備える、半導体装置の製造方法。 - 請求項8に記載の半導体装置の製造方法において、
前記蒸着がスパッタ蒸着である、半導体装置の製造方法。 - 第1の電極が形成された他の半導体チップまたは基板に接続される、半導体チップまたは基板であって、
前記前記第1の電極に対向する位置に第2の電極が形成され、
前記第2の電極の上に筒状電極がさらに形成されており、
前記筒状電極が、前記第1の電極と機械的・電気的に接続されるよう構造されている、半導体チップまたは基板。
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JP2015165185A (ja) | 2012-07-04 | 2015-09-17 | 株式会社島津製作所 | 放射線二次元検出器 |
JP6456232B2 (ja) * | 2015-04-30 | 2019-01-23 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
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JPH02271634A (ja) * | 1989-04-13 | 1990-11-06 | Sony Corp | 多層配線形成方法およびこれに用いる真空蒸着装置 |
JPH11260848A (ja) * | 1998-03-10 | 1999-09-24 | Nippon Hoso Kyokai <Nhk> | 電極形成方法 |
JP2003298012A (ja) * | 2002-01-30 | 2003-10-17 | Nippon Hoso Kyokai <Nhk> | 半導体装置およびその製造方法 |
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