JPWO2009101664A1 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JPWO2009101664A1 JPWO2009101664A1 JP2009553292A JP2009553292A JPWO2009101664A1 JP WO2009101664 A1 JPWO2009101664 A1 JP WO2009101664A1 JP 2009553292 A JP2009553292 A JP 2009553292A JP 2009553292 A JP2009553292 A JP 2009553292A JP WO2009101664 A1 JPWO2009101664 A1 JP WO2009101664A1
- Authority
- JP
- Japan
- Prior art keywords
- conductive
- electrode
- substrate
- mask
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53276—Conductive materials containing carbon, e.g. fullerenes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
- C01B32/00—Carbon; Compounds thereof
- C01B32/15—Nano-sized carbon materials
- C01B32/158—Carbon nanotubes
- C01B32/168—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
- H01L2221/1094—Conducting structures comprising nanotubes or nanowires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05575—Plural external layers
- H01L2224/0558—Plural external layers being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05639—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/11003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13025—Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81053—Bonding environment
- H01L2224/81054—Composition of the atmosphere
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/81201—Compression bonding
- H01L2224/81208—Compression bonding applying unidirectional static pressure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06541—Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01012—Magnesium [Mg]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01018—Argon [Ar]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01019—Potassium [K]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0203—Fillers and particles
- H05K2201/0242—Shape of an individual particle
- H05K2201/026—Nanotubes or nanowires
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0338—Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0557—Non-printed masks
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Nanotechnology (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Organic Chemistry (AREA)
- Composite Materials (AREA)
- Inorganic Chemistry (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Carbon And Carbon Compounds (AREA)
- Wire Bonding (AREA)
Abstract
Description
半導体基板の表面の一部の領域に形成されている電極、及び成長用基板の表面に林立した複数の導電性ナノチューブの先端を、希ガスプラズマに晒す工程と、
前記希ガスプラズマに晒された前記導電性ナノチューブの先端を、前記基板の電極に接触させ、該導電性ナノチューブを該電極に固定する工程と、
前記成長用基板を、前記電極に接触していない前記導電性ナノチューブとともに前記半導体基板から離し、前記電極に固定された導電性ナノチューブは前記半導体基板側に残す工程と
を有する。
表面の一部の領域に電極が形成されている半導体基板の該表面上に、該電極に対応する開口が形成されたマスクを配置する工程と、
前記マスクの開口の底面に露出した前記電極の上に、導電性材料を堆積させる工程と、
表面に複数の導電性ナノチューブが林立した成長用基板を、前記半導体基板に対向させ、前記マスクの開口が配置されている領域の前記導電性ナノチューブを、該開口内に堆積している前記導電性材料に接触させると共に、該開口が配置されていない領域の前記導電性ナノチューブを前記マスクに押し付けて撓ませる工程と、
前記導電性材料に接触している前記導電性ナノチューブを、該導電性材料に固定する工程と、
前記成長用基板を、前記導電性材料に固定されていない前記導電性ナノチューブとともに前記半導体基板から離し、前記導電性材料に固定された導電性ナノチューブは前記半導体基板側に残す工程と、
前記マスクを前記半導体基板から離す工程と
を有する。
成長用基板の表面に林立した複数の導電性ナノチューブの先端に、下地膜及び表層膜がこの順番に積層された先端金属部材を形成する工程と、
半導体基板の表面の一部の領域に形成されている電極に、前記先端金属部材を接触させ、前記導電性ナノチューブを前記電極に固定する工程と、
前記成長用基板を、前記半導体基板から離し、前記電極に固定された導電性ナノチューブを前記半導体基板側に残す工程と
を有し、
前記下地膜は、前記導電性ナノチューブと前記表層膜との密着性を高める性質を有する金属で形成され、前記表層膜は、前記下地膜よりも柔らかい金属で形成されている。
11 Ti膜
12 Ni膜
15、15a カーボンナノチューブ
20 半導体基板
21 パッド
22 保護膜
23、23A 電極
30 アルゴンプラズマ発生装置
31 アルゴンプラズマ
40 マスク
40A 開口
41a、41b アルミニウム膜
51 導電性材料
55 下地膜
56 表層膜
57 先端金属部材
60、60a、60b 半導体基板
61、61a、61b 多層配線層
62、62a、62b 電極
63、63a 貫通ビアホール
64、64a 絶縁膜
65、65a 垂直接続部材
66 第1の基板
66a 第2の基板
66b 第3の基板
68 メタルマスク
70、70a 金属膜
73 メタルマスク
80a 樹脂
85 先端金属部材
95、95a 垂直接続部材
Claims (10)
- 半導体基板の表面の一部の領域に形成されている電極と、成長用基板の表面に林立した複数の導電性ナノチューブの先端とを、希ガスプラズマに晒す工程と、
前記希ガスプラズマに晒された前記導電性ナノチューブの先端を、前記電極に接触させ、該導電性ナノチューブを該電極に固定する工程と、
前記成長用基板を、前記半導体基板から離し、前記電極に固定された導電性ナノチューブを前記半導体基板側に残す工程と
を有する半導体装置の製造方法。 - 前記電極を前記希ガスプラズマに晒す前に、前記電極が形成されている表面上に、該電極に対応する開口が形成されたマスクを配置し、
前記希ガスプラズマに晒す工程において、該マスクの表面と、該マスクの開口内に露出している該電極の表面とを前記希ガスプラズマに晒し、
前記導電性ナノチューブを固定する工程において、前記マスクの開口が配置されている領域の前記導電性ナノチューブを、該開口を通して前記電極に接触させると共に、前記開口が配置されていない領域の前記導電性ナノチューブを、前記マスクに押し付けることによって撓ませ、
前記成長用基板を前記半導体基板から離す工程が、前記マスクを前記半導体基板から離す工程を含む請求項1に記載の半導体装置の製造方法。 - 前記マスクの厚さが、前記導電性ナノチューブの長さの10〜30%の範囲内である請求項2に記載の半導体装置の製造方法。
- 前記導電性ナノチューブと前記電極との接触部分において、前記導電性ナノチューブの材料と前記電極の材料とを合金化することにより、該導電性ナノチューブを該電極に固定する請求項1乃至3のいずれか1項に記載の半導体装置の製造方法。
- 前記導電性ナノチューブの先端を希ガスプラズマに晒す前に、該導電性ナノチューブの先端に、下地膜及び表層膜がこの順番に積層された先端金属部材を形成する工程を有し、
前記下地膜は、前記導電性ナノチューブと前記表層膜との密着性を高める性質を有する金属で形成され、前記表層膜は、前記下地膜よりも柔らかい金属で形成されており、
前記希ガスプラズマに晒す工程において、前記先端金属部材が前記希ガスプラズマに晒される請求項1乃至4のいずれか1項に記載の半導体装置の製造方法。 - 前記下地膜及び前記表層膜は、ターゲットに対して前記成長用基板を傾けた状態でスパッタリングにより形成する請求項5に記載の半導体装置の製造方法。
- 前記成長用基板を自転させながら、スパッタリングにより前記下地膜及び前記表層膜を形成する請求項5または6に記載の半導体装置の製造方法。
- 表面の一部の領域に電極が形成されている半導体基板の該表面上に、該電極に対応する開口が形成されたマスクを配置する工程と、
前記マスクの開口の底面に露出した前記電極の上に、導電性材料を堆積させる工程と、
表面に複数の導電性ナノチューブが林立した成長用基板を、前記半導体基板に対向させ、前記マスクの開口が配置されている領域の前記導電性ナノチューブを、該開口内に堆積している前記導電性材料に接触させると共に、該開口が配置されていない領域の前記導電性ナノチューブを前記マスクに押し付けて撓ませる工程と、
前記導電性材料に接触している前記導電性ナノチューブを、該導電性材料に固定する工程と、
前記成長用基板を前記半導体基板から離し、前記導電性材料に固定された導電性ナノチューブを前記半導体基板側に残す工程と、
前記マスクを前記半導体基板から離す工程と
を有する半導体装置の製造方法。 - 前記導電性材料が導電性ペーストまたは半田ペーストである請求項8に記載の半導体装置の製造方法。
- 成長用基板の表面に林立した複数の導電性ナノチューブの先端に、下地膜及び表層膜がこの順番に積層された先端金属部材を形成する工程と、
半導体基板の表面の一部の領域に形成されている電極に、前記先端金属部材を接触させ、前記導電性ナノチューブを前記電極に固定する工程と、
前記成長用基板を前記半導体基板から離し、前記電極に固定された導電性ナノチューブを前記半導体基板側に残す工程と
を有し、
前記下地膜は、前記導電性ナノチューブと前記表層膜との密着性を高める性質を有する金属で形成され、前記表層膜は、前記下地膜よりも柔らかい金属で形成されている半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009553292A JP5051243B2 (ja) | 2008-02-15 | 2008-12-01 | 半導体装置の製造方法 |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008035167 | 2008-02-15 | ||
JP2008035167 | 2008-02-15 | ||
PCT/JP2008/003544 WO2009101664A1 (ja) | 2008-02-15 | 2008-12-01 | 半導体装置の製造方法 |
JP2009553292A JP5051243B2 (ja) | 2008-02-15 | 2008-12-01 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2009101664A1 true JPWO2009101664A1 (ja) | 2011-06-02 |
JP5051243B2 JP5051243B2 (ja) | 2012-10-17 |
Family
ID=40956711
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009553292A Active JP5051243B2 (ja) | 2008-02-15 | 2008-12-01 | 半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8735274B2 (ja) |
JP (1) | JP5051243B2 (ja) |
WO (1) | WO2009101664A1 (ja) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101811658B (zh) | 2009-02-20 | 2012-09-19 | 清华大学 | 碳纳米管阵列传感器及其制备方法 |
JP2011119539A (ja) * | 2009-12-04 | 2011-06-16 | Fujitsu Ltd | バンプ構造体及びその製造方法、電子機器とその製造方法 |
JP6433430B2 (ja) * | 2012-12-13 | 2018-12-05 | カリフォルニア インスティチュート オブ テクノロジー | 三次元高表面領域電極の製造 |
US10376146B2 (en) | 2013-02-06 | 2019-08-13 | California Institute Of Technology | Miniaturized implantable electrochemical sensor devices |
SG2013083258A (en) * | 2013-11-06 | 2015-06-29 | Thales Solutions Asia Pte Ltd | A guard structure for signal isolation |
JP6330415B2 (ja) * | 2014-03-27 | 2018-05-30 | 富士通株式会社 | 半導体装置の製造方法 |
US10368788B2 (en) | 2015-07-23 | 2019-08-06 | California Institute Of Technology | System and methods for wireless drug delivery on command |
US10920085B2 (en) | 2016-01-20 | 2021-02-16 | Honda Motor Co., Ltd. | Alteration of carbon fiber surface properties via growing of carbon nanotubes |
US11058337B2 (en) * | 2017-02-03 | 2021-07-13 | International Business Machines Corporation | Flexible silicon nanowire electrode |
JPWO2018173884A1 (ja) * | 2017-03-21 | 2020-01-30 | 日本電産リード株式会社 | プローブ構造体、及びプローブ構造体の製造方法 |
CA2985254A1 (en) * | 2017-11-14 | 2019-05-14 | Vuereal Inc | Integration and bonding of micro-devices into system substrate |
JP7238586B2 (ja) * | 2019-05-08 | 2023-03-14 | 富士通株式会社 | 導電性放熱フィルム、導電性放熱フィルムの製造方法、及び電子装置の製造方法 |
CN111470468B (zh) * | 2020-04-22 | 2023-07-25 | 华中科技大学 | 一种垂直碳纳米管向目标衬底转移的方法 |
EP4372807A1 (en) * | 2022-11-16 | 2024-05-22 | Infineon Technologies AG | Substrate arrangement and methods for producing a substrate arrangement |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10147864A (ja) * | 1996-11-20 | 1998-06-02 | Nec Corp | 薄膜形成方法及びスパッタ装置 |
KR100258875B1 (ko) * | 1998-01-15 | 2000-06-15 | 김영환 | 다층배선용 비아형성방법 |
JP4063944B2 (ja) | 1998-03-13 | 2008-03-19 | 独立行政法人科学技術振興機構 | 3次元半導体集積回路装置の製造方法 |
US6340822B1 (en) * | 1999-10-05 | 2002-01-22 | Agere Systems Guardian Corp. | Article comprising vertically nano-interconnected circuit devices and method for making the same |
DE10127351A1 (de) * | 2001-06-06 | 2002-12-19 | Infineon Technologies Ag | Elektronischer Chip und elektronische Chip-Anordnung |
WO2004064159A1 (ja) * | 2003-01-15 | 2004-07-29 | Fujitsu Limited | 半導体装置及び三次元実装半導体装置、並びに半導体装置の製造方法 |
JP4355928B2 (ja) | 2003-02-26 | 2009-11-04 | 三菱瓦斯化学株式会社 | 電界放出型冷陰極の製造方法 |
US7150801B2 (en) * | 2003-02-26 | 2006-12-19 | Mitsubishi Gas Chemical Company, Inc. | Process for producing cold field-emission cathodes |
US20090115042A1 (en) * | 2004-06-04 | 2009-05-07 | Zycube Co., Ltd. | Semiconductor device having three-dimensional stacked structure and method of fabricating the same |
JP2006066169A (ja) * | 2004-08-26 | 2006-03-09 | Sony Corp | 表示装置の製造方法 |
US20060057388A1 (en) * | 2004-09-10 | 2006-03-16 | Sungho Jin | Aligned and open-ended nanotube structure and method for making the same |
FR2876243B1 (fr) * | 2004-10-04 | 2007-01-26 | Commissariat Energie Atomique | Composant a protuberances conductrices ductiles enterrees et procede de connexion electrique entre ce composant et un composant muni de pointes conductrices dures |
TWI255466B (en) * | 2004-10-08 | 2006-05-21 | Ind Tech Res Inst | Polymer-matrix conductive film and method for fabricating the same |
CN1959896B (zh) * | 2005-11-04 | 2011-03-30 | 鸿富锦精密工业(深圳)有限公司 | 碳纳米管场发射体及其制备方法 |
JP2007188662A (ja) | 2006-01-11 | 2007-07-26 | Mitsubishi Gas Chem Co Inc | 電界放出型冷陰極の製造方法 |
US8017860B2 (en) * | 2006-05-15 | 2011-09-13 | Stion Corporation | Method and structure for thin film photovoltaic materials using bulk semiconductor materials |
JP4744360B2 (ja) * | 2006-05-22 | 2011-08-10 | 富士通株式会社 | 半導体装置 |
-
2008
- 2008-12-01 JP JP2009553292A patent/JP5051243B2/ja active Active
- 2008-12-01 WO PCT/JP2008/003544 patent/WO2009101664A1/ja active Application Filing
-
2010
- 2010-06-25 US US12/823,750 patent/US8735274B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP5051243B2 (ja) | 2012-10-17 |
US8735274B2 (en) | 2014-05-27 |
WO2009101664A1 (ja) | 2009-08-20 |
US20100261343A1 (en) | 2010-10-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5051243B2 (ja) | 半導体装置の製造方法 | |
JP4744360B2 (ja) | 半導体装置 | |
EP0070435B1 (en) | Semiconductor device comprising a semiconductor substrate bonded to a mounting means | |
JP5212253B2 (ja) | シート状構造体の製造方法 | |
US20110067908A1 (en) | Method for producing a printed circuit board and use and printed circuit board | |
TW200933838A (en) | Integrated circuit device incorporating metallurigacal bond to enhance thermal conduction to a heat sink | |
JP2008210954A (ja) | カーボンナノチューブバンプ構造体とその製造方法、およびこれを用いた半導体装置 | |
JPH0936186A (ja) | パワー半導体モジュール及びその実装方法 | |
JP2006114827A (ja) | 半導体装置 | |
US6534792B1 (en) | Microelectronic device structure with metallic interlayer between substrate and die | |
JP5760668B2 (ja) | シート状構造体及びその製造方法並びに電子機器及びその製造方法 | |
JP2010165807A (ja) | 絶縁回路基板の製造方法及び絶縁回路基板並びにパワーモジュール用基板 | |
US20140151009A1 (en) | Thermal interface element and method of preparation | |
US20050016992A1 (en) | Heating device | |
JP5332775B2 (ja) | 電子部品及びその製造方法 | |
JP3261912B2 (ja) | バンプ付き半導体装置およびその製造方法 | |
US6699571B1 (en) | Devices and methods for mounting components of electronic circuitry | |
JP2010118469A (ja) | 半導体装置及びその製造方法 | |
JP2005050886A (ja) | 複合基板及びその製造方法 | |
JP5292772B2 (ja) | 電子部品及びその製造方法 | |
JP2011119539A (ja) | バンプ構造体及びその製造方法、電子機器とその製造方法 | |
JP2008028295A (ja) | パワー半導体モジュール及びその製造方法 | |
JP5935302B2 (ja) | シート状構造体及びその製造方法並びに電子機器及びその製造方法 | |
JP4403661B2 (ja) | 放熱板を用いた部品の実装構造及びその製造方法 | |
WO2016171122A1 (ja) | 半導体装置及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120626 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120709 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5051243 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150803 Year of fee payment: 3 |