JPS6485421A - Programmable logic device - Google Patents
Programmable logic deviceInfo
- Publication number
- JPS6485421A JPS6485421A JP62243026A JP24302687A JPS6485421A JP S6485421 A JPS6485421 A JP S6485421A JP 62243026 A JP62243026 A JP 62243026A JP 24302687 A JP24302687 A JP 24302687A JP S6485421 A JPS6485421 A JP S6485421A
- Authority
- JP
- Japan
- Prior art keywords
- points
- logic circuit
- circuit components
- wires
- crossed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Abstract
PURPOSE:To smooth the connection between circuit components by forming a zigzag complex arrangement to programmable logic circuit components and arranging a switch circuit to a point where wires of wiring region caused by the complex arrangement are crossed or collected so as to improve the degree of freedom of branch. CONSTITUTION:The programmable logic circuit elements E is a zigzag complex arrangement while even number order of columns are shifted vertically from the left, and the wiring region 1 arranged with plural wires longitudinally and laterally is formed between the logic circuit components E. Lots of T points 1a being signal branch points are formed to the wiring region 1 by the zigzag arrangement. Since the input/output wirings of logic circuit components E and plural wires are crossed or gathered to the T points 1a, a switch circuit S connecting/disconnecting the crossed or gathered wires programmably is arranged. Thus, lots of cross or gathered points of wirings are given to the wire region and the locations offering effective branch are increased to improve the degree of freedom of progammable wirings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62243026A JPS6485421A (en) | 1987-09-28 | 1987-09-28 | Programmable logic device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62243026A JPS6485421A (en) | 1987-09-28 | 1987-09-28 | Programmable logic device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6485421A true JPS6485421A (en) | 1989-03-30 |
Family
ID=17097764
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62243026A Pending JPS6485421A (en) | 1987-09-28 | 1987-09-28 | Programmable logic device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6485421A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008236756A (en) * | 2007-03-21 | 2008-10-02 | Altera Corp | Staggered logic array block architecture |
-
1987
- 1987-09-28 JP JP62243026A patent/JPS6485421A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008236756A (en) * | 2007-03-21 | 2008-10-02 | Altera Corp | Staggered logic array block architecture |
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