JPS6480127A - Programmable logic device - Google Patents

Programmable logic device

Info

Publication number
JPS6480127A
JPS6480127A JP62238159A JP23815987A JPS6480127A JP S6480127 A JPS6480127 A JP S6480127A JP 62238159 A JP62238159 A JP 62238159A JP 23815987 A JP23815987 A JP 23815987A JP S6480127 A JPS6480127 A JP S6480127A
Authority
JP
Japan
Prior art keywords
input
output
line
plural
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62238159A
Other languages
Japanese (ja)
Inventor
Keiichi Kawana
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JFE Steel Corp
Original Assignee
Kawasaki Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kawasaki Steel Corp filed Critical Kawasaki Steel Corp
Priority to JP62238159A priority Critical patent/JPS6480127A/en
Publication of JPS6480127A publication Critical patent/JPS6480127A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H03K19/17744—Structural details of routing resources for input/output signals

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To improve the degree of integration of a logic circuit including a large sized sequence circuit by connecting freely input/output terminals for plural logic elements and plural storage elements by means of a switch means. CONSTITUTION:One input/output side of an input/output circuit 1 connects to an external input/output terminal and other input/output side connects to an input/output line 1a in crossing with plural wires 3. The input terminal line 2a of the logic element 2 is arranged with the output terminal line 2b in crossing with plural wires. The input terminal line 6a and the output terminal line 6b of the storage element 6 are arranged in crossing the wire 3. Thus, switches 4, 5 are used to connect optionally the input/output line 1a of the input/output circuit 1, the input/output terminal 2a, 2b of the logical element 2 and the input/output terminal lines 6a, 6b with longitudinal/lateral wires 3.
JP62238159A 1987-09-22 1987-09-22 Programmable logic device Pending JPS6480127A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62238159A JPS6480127A (en) 1987-09-22 1987-09-22 Programmable logic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62238159A JPS6480127A (en) 1987-09-22 1987-09-22 Programmable logic device

Publications (1)

Publication Number Publication Date
JPS6480127A true JPS6480127A (en) 1989-03-27

Family

ID=17026063

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62238159A Pending JPS6480127A (en) 1987-09-22 1987-09-22 Programmable logic device

Country Status (1)

Country Link
JP (1) JPS6480127A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04326209A (en) * 1991-04-25 1992-11-16 Kawasaki Steel Corp Programmable logic element
JP2006053687A (en) * 2004-08-10 2006-02-23 Sony Corp Arithmetic unit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61198919A (en) * 1984-09-26 1986-09-03 エキシリンク，インコ−ポレイテツド Special mutual connection for form adaptable logical array

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61198919A (en) * 1984-09-26 1986-09-03 エキシリンク，インコ−ポレイテツド Special mutual connection for form adaptable logical array

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04326209A (en) * 1991-04-25 1992-11-16 Kawasaki Steel Corp Programmable logic element
JP2006053687A (en) * 2004-08-10 2006-02-23 Sony Corp Arithmetic unit

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