JPS6467966A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6467966A
JPS6467966A JP22504587A JP22504587A JPS6467966A JP S6467966 A JPS6467966 A JP S6467966A JP 22504587 A JP22504587 A JP 22504587A JP 22504587 A JP22504587 A JP 22504587A JP S6467966 A JPS6467966 A JP S6467966A
Authority
JP
Japan
Prior art keywords
region
electrons
substrate
intensity
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22504587A
Other languages
Japanese (ja)
Inventor
Hitoshi Teshigahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP22504587A priority Critical patent/JPS6467966A/en
Publication of JPS6467966A publication Critical patent/JPS6467966A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To prevent hot electrons from flowing to a gate oxide film by increas ing the effective length of a channel region by a groove formed on a semiconduc tor substrate, thereby weakening the intensity of an electric field. CONSTITUTION:When a p-type semiconductor substrate 1 and a source electrode 8 are grounded and a positive voltage of at least a predetermined value is applied to a gate electrode 10 and a drain electrode 9, electrons flow from a source region 5 to a drain region 6 in a channel region 7. Here, the region 7 is formed near a boundary between a gate oxide film 3 and the substrate 1, but since a groove 11 is provided, the effective length of the region 7 is increased. Thus, the intensity of an electric field is weakened, and since maxi mum energy of obtaining the electrons is reduced, hot electrons are reduced.
JP22504587A 1987-09-08 1987-09-08 Semiconductor device Pending JPS6467966A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22504587A JPS6467966A (en) 1987-09-08 1987-09-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22504587A JPS6467966A (en) 1987-09-08 1987-09-08 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6467966A true JPS6467966A (en) 1989-03-14

Family

ID=16823176

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22504587A Pending JPS6467966A (en) 1987-09-08 1987-09-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6467966A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0449418A2 (en) * 1990-02-26 1991-10-02 Advanced Micro Devices, Inc. Insulated gate field effect device with a curved channel and method of fabrication
US5248893A (en) * 1990-02-26 1993-09-28 Advanced Micro Devices, Inc. Insulated gate field effect device with a smoothly curved depletion boundary in the vicinity of the channel-free zone
US5502322A (en) * 1992-12-02 1996-03-26 Hyundai Electronics Industries Co., Ltd. Transistor having a nonuniform doping channel
US5736418A (en) * 1996-06-07 1998-04-07 Lsi Logic Corporation Method for fabricating a field effect transistor using microtrenches to control hot electron effects
EP0905783A1 (en) * 1997-09-30 1999-03-31 Siemens Aktiengesellschaft Vertical transistor implemented in a memory cell comprising a trench capacitor

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0449418A2 (en) * 1990-02-26 1991-10-02 Advanced Micro Devices, Inc. Insulated gate field effect device with a curved channel and method of fabrication
US5248893A (en) * 1990-02-26 1993-09-28 Advanced Micro Devices, Inc. Insulated gate field effect device with a smoothly curved depletion boundary in the vicinity of the channel-free zone
US5502322A (en) * 1992-12-02 1996-03-26 Hyundai Electronics Industries Co., Ltd. Transistor having a nonuniform doping channel
US5736418A (en) * 1996-06-07 1998-04-07 Lsi Logic Corporation Method for fabricating a field effect transistor using microtrenches to control hot electron effects
EP0905783A1 (en) * 1997-09-30 1999-03-31 Siemens Aktiengesellschaft Vertical transistor implemented in a memory cell comprising a trench capacitor

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