JPS6465865A - Manufacture of complementary semiconductor device - Google Patents
Manufacture of complementary semiconductor deviceInfo
- Publication number
- JPS6465865A JPS6465865A JP62221231A JP22123187A JPS6465865A JP S6465865 A JPS6465865 A JP S6465865A JP 62221231 A JP62221231 A JP 62221231A JP 22123187 A JP22123187 A JP 22123187A JP S6465865 A JPS6465865 A JP S6465865A
- Authority
- JP
- Japan
- Prior art keywords
- depth
- substrate
- layer
- resist
- implanted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To enable a well to be easily provided which has such a profile that its impurity concentration is low on the surface and high at its interface with a substrate by a method wherein an ion implantation, semiconductor layer deposit, ion implantation, and a heat treatment are performed onto a semiconductor substrate. CONSTITUTION:A resist mask is provided onto a p-type Si substrate and P ions are implanted so as to form an n layer 3 at the depth of 0.2mum. The resist is removed and an eptaxial layer 4 is overlapped thereon to be about 1mum in thickness. A resist mask 5 is applied again and P ions are implanted in a dose smaller than the preceeding implantation so as to form an n layer at the depth of 0.2mum. Next, the substrate 1 is subjected to a heat treatment at a temperature of 1100 deg.C for about 50 minutes so as to remove the resist 5, and thus a so-called retrograted well is formed at the depth of about 2mum, which is highest at the depth of about 1.2mum in impurity concentration.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62221231A JPS6465865A (en) | 1987-09-05 | 1987-09-05 | Manufacture of complementary semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62221231A JPS6465865A (en) | 1987-09-05 | 1987-09-05 | Manufacture of complementary semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6465865A true JPS6465865A (en) | 1989-03-13 |
Family
ID=16763521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62221231A Pending JPS6465865A (en) | 1987-09-05 | 1987-09-05 | Manufacture of complementary semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6465865A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6630375B2 (en) | 1994-07-28 | 2003-10-07 | Hitachi, Ltd. | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device |
| JP2016046498A (en) * | 2014-08-27 | 2016-04-04 | セイコーエプソン株式会社 | Semiconductor device and manufacturing method of the same |
-
1987
- 1987-09-05 JP JP62221231A patent/JPS6465865A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6630375B2 (en) | 1994-07-28 | 2003-10-07 | Hitachi, Ltd. | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device |
| US6806130B2 (en) | 1994-07-28 | 2004-10-19 | Renesas Technology Corp. | Process for manufacturing a semiconductor wafer, a semiconductor wafer, process for manufacturing a semiconductor integrated circuit device, and semiconductor integrated circuit device |
| JP2016046498A (en) * | 2014-08-27 | 2016-04-04 | セイコーエプソン株式会社 | Semiconductor device and manufacturing method of the same |
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