JPS6447035A - Manufacture of optical semiconductor device - Google Patents

Manufacture of optical semiconductor device

Info

Publication number
JPS6447035A
JPS6447035A JP20548087A JP20548087A JPS6447035A JP S6447035 A JPS6447035 A JP S6447035A JP 20548087 A JP20548087 A JP 20548087A JP 20548087 A JP20548087 A JP 20548087A JP S6447035 A JPS6447035 A JP S6447035A
Authority
JP
Japan
Prior art keywords
resin
optical semiconductor
molded parts
window
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20548087A
Other languages
Japanese (ja)
Inventor
Toshio Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20548087A priority Critical patent/JPS6447035A/en
Publication of JPS6447035A publication Critical patent/JPS6447035A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To ensure high positional accuracy for a molded device by a method wherein a lead frame mounted with an optical semiconductor element is sandwiched between a pair of thermoplastic resin molded parts provided with a plurality of recesses, heat and pressure are applied for their solidification, cavities in the molded parts are sealed up with resin, and through-holes are provided for the resin-sealed sections to be exposed in window-forming protrusions. CONSTITUTION:An optical semiconductor 5 is installed on a lead frame 2 and is bonded thereto by a metal fine wire 6. An upper molded part 1 provided with a window- forming protrusion 1a is positioned on and aligned to a lower molded part 3, the lead frame 2 is sandwiched between them, and then a heater-presser 7 is actuated for fusion. A top force 10 and a bottom force 11 are closed, with the upper and lower molded parts 1 and 3 kept in contact with each other. A transparent resin 3 is injected. Portions, not sealed in the resin, of the molded parts 1 and 3 are disconnected for removal, and an outer lead 15 is attached and then subjected to a required manufactur ing process. The upper molded part 1 is removed of its windowforming protrusion 1a. Finally, various surface treatments are accomplished for a through-hole 16 to be converted into a photodetecting window for the optical semiconductor element 5.
JP20548087A 1987-08-18 1987-08-18 Manufacture of optical semiconductor device Pending JPS6447035A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20548087A JPS6447035A (en) 1987-08-18 1987-08-18 Manufacture of optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20548087A JPS6447035A (en) 1987-08-18 1987-08-18 Manufacture of optical semiconductor device

Publications (1)

Publication Number Publication Date
JPS6447035A true JPS6447035A (en) 1989-02-21

Family

ID=16507550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20548087A Pending JPS6447035A (en) 1987-08-18 1987-08-18 Manufacture of optical semiconductor device

Country Status (1)

Country Link
JP (1) JPS6447035A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101814463A (en) * 2009-02-20 2010-08-25 雅马哈株式会社 Semiconductor package and manufacture method thereof
JP2012039122A (en) * 2010-08-09 2012-02-23 Lg Innotek Co Ltd Light emitting element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101814463A (en) * 2009-02-20 2010-08-25 雅马哈株式会社 Semiconductor package and manufacture method thereof
JP2012039122A (en) * 2010-08-09 2012-02-23 Lg Innotek Co Ltd Light emitting element
US8399904B2 (en) 2010-08-09 2013-03-19 Lg Innotek Co., Ltd. Light emitting device and lighting system having the same

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