JPS6446952A - Integrated circuit functional element - Google Patents

Integrated circuit functional element

Info

Publication number
JPS6446952A
JPS6446952A JP20470487A JP20470487A JPS6446952A JP S6446952 A JPS6446952 A JP S6446952A JP 20470487 A JP20470487 A JP 20470487A JP 20470487 A JP20470487 A JP 20470487A JP S6446952 A JPS6446952 A JP S6446952A
Authority
JP
Japan
Prior art keywords
wiring
functional element
peripheral
wiring region
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20470487A
Other languages
Japanese (ja)
Inventor
Hiroshi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP20470487A priority Critical patent/JPS6446952A/en
Publication of JPS6446952A publication Critical patent/JPS6446952A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the unfinished wiring, and reduce the wiring region, by arranging input terminals and output terminals on the upper and lower sides and the right and left sides of an peripheral frame of an element, and arranging them also at the position in the inside of the frame spaced a minimum design rule away from the peripheral frame. CONSTITUTION:On a peripheral frame 2 of a functional element 1, the following are arranged; input terminals 3a on the upper side and lower side, the similar output terminals 3b, an input terminal 4 on the left peripheral side, and an output terminal 5 on the right peripheral side. Since the output terminal 5 of an functional element A and the input terminal 4 of an functional element B are connected, the wiring passing through a wiring region dose not appear. By making the input terminal 4 and the output terminal 5 on the right and the left peripheral sides retreat toward the inside by a minimum design rule, the constitution of necessary wiring only is enabled without requiring a special wiring region. Thereby, unfinished wiring of an integrated circuit applying functional elements such as a standard cell LSI, and a gate array LSI can be prevented, and the reduction of wiring region is enabled.
JP20470487A 1987-08-17 1987-08-17 Integrated circuit functional element Pending JPS6446952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20470487A JPS6446952A (en) 1987-08-17 1987-08-17 Integrated circuit functional element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20470487A JPS6446952A (en) 1987-08-17 1987-08-17 Integrated circuit functional element

Publications (1)

Publication Number Publication Date
JPS6446952A true JPS6446952A (en) 1989-02-21

Family

ID=16494931

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20470487A Pending JPS6446952A (en) 1987-08-17 1987-08-17 Integrated circuit functional element

Country Status (1)

Country Link
JP (1) JPS6446952A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04299842A (en) * 1991-03-28 1992-10-23 Toshiba Corp Designing method for semicustom semiconductor integrated circuit macrocell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04299842A (en) * 1991-03-28 1992-10-23 Toshiba Corp Designing method for semicustom semiconductor integrated circuit macrocell

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