JPS6431434A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS6431434A
JPS6431434A JP18817187A JP18817187A JPS6431434A JP S6431434 A JPS6431434 A JP S6431434A JP 18817187 A JP18817187 A JP 18817187A JP 18817187 A JP18817187 A JP 18817187A JP S6431434 A JPS6431434 A JP S6431434A
Authority
JP
Japan
Prior art keywords
groove
oxide film
silicon
type
filler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18817187A
Other languages
Japanese (ja)
Inventor
Hisashi Takemura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18817187A priority Critical patent/JPS6431434A/en
Publication of JPS6431434A publication Critical patent/JPS6431434A/en
Pending legal-status Critical Current

Links

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  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the integration of a semiconductor device by providing a P-N junction formed in contact with the lower part of a second conductivity type region which occupies at least the upper part of the groove of a semiconductor filler. CONSTITUTION:A silicon oxide film 203 is formed on a semiconductor substrate surface having a high concentration P-type semiconductor layer 201a made of silicon, a low concentration P-type semiconductor layer 201b and a low concentration N-type semiconductor layer 202, a silicon nitride film 210 is formed thereon, and a groove 211 is formed. Then, after the surface of the groove 211 is oxidized, the oxide film of the bottom of the groove is removed, and an insulating sidewall made of a silicon oxide film 205 covering the side face of the groove 211 is formed, and a semiconductor filler 212 made of a P-type impurity-doped silicon epitaxially grown layer is formed. Then, N-type impurity atoms, such as phosphorus are added to the filler 212 to form an N-type region 208, a silicon oxide film 213 is formed, and the silicon nitride film 210 is removed. Then, a hole 214 is selectively formed partly on the groove, and an aluminum electrode 109 is formed.
JP18817187A 1987-07-27 1987-07-27 Semiconductor integrated circuit Pending JPS6431434A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18817187A JPS6431434A (en) 1987-07-27 1987-07-27 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18817187A JPS6431434A (en) 1987-07-27 1987-07-27 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS6431434A true JPS6431434A (en) 1989-02-01

Family

ID=16219000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18817187A Pending JPS6431434A (en) 1987-07-27 1987-07-27 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS6431434A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4300986A1 (en) * 1992-01-17 1993-07-22 Mitsubishi Electric Corp Semiconductor device used to insulate element - comprising substrate with impurity region having strip running parallel to main surface
US5598019A (en) * 1993-04-07 1997-01-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having trench isolation structure and method of manufacturing the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4300986A1 (en) * 1992-01-17 1993-07-22 Mitsubishi Electric Corp Semiconductor device used to insulate element - comprising substrate with impurity region having strip running parallel to main surface
US5457339A (en) * 1992-01-17 1995-10-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor device for element isolation and manufacturing method thereof
DE4300986C2 (en) * 1992-01-17 1999-08-26 Mitsubishi Electric Corp Semiconductor device for element isolation and manufacturing method thereof
US5598019A (en) * 1993-04-07 1997-01-28 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having trench isolation structure and method of manufacturing the same

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