JPS6418314A - Logic circuit - Google Patents

Logic circuit

Info

Publication number
JPS6418314A
JPS6418314A JP62175246A JP17524687A JPS6418314A JP S6418314 A JPS6418314 A JP S6418314A JP 62175246 A JP62175246 A JP 62175246A JP 17524687 A JP17524687 A JP 17524687A JP S6418314 A JPS6418314 A JP S6418314A
Authority
JP
Japan
Prior art keywords
terminal
turned
input
output
logic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62175246A
Other languages
Japanese (ja)
Inventor
Hiroshi Kuranaga
Takeo Nakabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62175246A priority Critical patent/JPS6418314A/en
Priority to DE19883823738 priority patent/DE3823738A1/en
Publication of JPS6418314A publication Critical patent/JPS6418314A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Abstract

PURPOSE:To attain more ease of layout and high circuit integration than the employment of a conventional logic circuit in making an integrated circuit by constituting a transmission gate by a transistor (TR) only and constituting the logic circuit without the use of any inverter. CONSTITUTION:With an H level is given to an input terminal B, a P-MOS TR 11 is turned off and an N-MOS TR 12 is turned on. Thus, the output terminal X is conductive to a power supply 8 and nonconductive to an input terminal A and the output signal goes to an H level. With an L level to the terminal B given, the TR 11 is turned on and the TR 12 is turned off. Thus, the terminal X is nonconductive with the power supply 8 and conductive to the terminal A and the input signal from the terminal A is an output signal to the terminal X. That is, with the input signal from the terminal A at H, the output goes to H and with the input from the terminal A at L, the output goes to L. As above, a signal representing OR logic to the logical values given to the terminals A, B is obtained at the terminal X.
JP62175246A 1987-07-13 1987-07-13 Logic circuit Pending JPS6418314A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62175246A JPS6418314A (en) 1987-07-13 1987-07-13 Logic circuit
DE19883823738 DE3823738A1 (en) 1987-07-13 1988-07-13 Logic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62175246A JPS6418314A (en) 1987-07-13 1987-07-13 Logic circuit

Publications (1)

Publication Number Publication Date
JPS6418314A true JPS6418314A (en) 1989-01-23

Family

ID=15992816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62175246A Pending JPS6418314A (en) 1987-07-13 1987-07-13 Logic circuit

Country Status (2)

Country Link
JP (1) JPS6418314A (en)
DE (1) DE3823738A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006146094A (en) * 2004-11-25 2006-06-08 Sanyo Electric Co Ltd Display device
JP2006180197A (en) * 2004-12-22 2006-07-06 Nec Electronics Corp Logic circuit and word driver circuit

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2663479A1 (en) * 1990-06-13 1991-12-20 Samsung Electronics Co Ltd Logic circuit including two inputs and one output
NL1020289C2 (en) * 2002-04-02 2003-10-03 Jan Hendrik Van De Pol Device for adding or subtracting.
GB2573795B (en) * 2018-05-17 2023-01-11 Pragmatic Printing Ltd AND gates and clock dividers
GB2611882B (en) * 2018-05-17 2023-07-05 Pragmatic Printing Ltd AND gates and clock dividers

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5471973A (en) * 1977-11-18 1979-06-08 Nec Corp Logical operation circuit
JPS5662427A (en) * 1979-10-26 1981-05-28 Pioneer Electronic Corp Logic circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5471973A (en) * 1977-11-18 1979-06-08 Nec Corp Logical operation circuit
JPS5662427A (en) * 1979-10-26 1981-05-28 Pioneer Electronic Corp Logic circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006146094A (en) * 2004-11-25 2006-06-08 Sanyo Electric Co Ltd Display device
JP2006180197A (en) * 2004-12-22 2006-07-06 Nec Electronics Corp Logic circuit and word driver circuit

Also Published As

Publication number Publication date
DE3823738A1 (en) 1989-01-26

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