JPS6417476A - Mos gate bipolar transistor - Google Patents
Mos gate bipolar transistorInfo
- Publication number
- JPS6417476A JPS6417476A JP17228987A JP17228987A JPS6417476A JP S6417476 A JPS6417476 A JP S6417476A JP 17228987 A JP17228987 A JP 17228987A JP 17228987 A JP17228987 A JP 17228987A JP S6417476 A JPS6417476 A JP S6417476A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- carrier
- region
- polycrystalline silicon
- bipolar transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- 230000006798 recombination Effects 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
PURPOSE:To erase remaining carrier or the like in a carrier conducting region in a short time and to shorten an opening time by forming the same conductivity type polycrystalline silicon layer is provided so as to cross a carrier conducting passage in the carrier conducting region. CONSTITUTION:A MOSFET is formed of a source layer 16, a channel forming region 14 and a drain layer 1, and a bipolar transistor is formed of a p-type layer 13, a carrier conducting region 4 and a drain layer 1. The region 4 is interposed between an n-type epitaxial layer 2 and a substrate 3, and therebetween, and formed of the same conductivity type polycrystalline silicon layer 5 as that of these regions. The layer 5 is erased by collecting minority carrier remaining or injected into the carrier conducting region at the time of opening at the grain lump boundary of the polycrystalline silicon as a recombination center in a short time. Thus, the opening time can be shortened.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17228987A JPS6417476A (en) | 1987-07-10 | 1987-07-10 | Mos gate bipolar transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17228987A JPS6417476A (en) | 1987-07-10 | 1987-07-10 | Mos gate bipolar transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6417476A true JPS6417476A (en) | 1989-01-20 |
Family
ID=15939170
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17228987A Pending JPS6417476A (en) | 1987-07-10 | 1987-07-10 | Mos gate bipolar transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6417476A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5323059A (en) * | 1991-05-06 | 1994-06-21 | Motorola, Inc. | Vertical current flow semiconductor device utilizing wafer bonding |
JPH1012628A (en) * | 1996-06-20 | 1998-01-16 | Nec Corp | Semiconductor substrate, its manufacture, and semiconductor device |
US5841197A (en) * | 1994-11-18 | 1998-11-24 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
US6124179A (en) * | 1996-09-05 | 2000-09-26 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
JPWO2012056536A1 (en) * | 2010-10-27 | 2014-03-20 | 富士電機株式会社 | Semiconductor device and manufacturing method of semiconductor device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63127572A (en) * | 1986-11-17 | 1988-05-31 | Nissan Motor Co Ltd | Conductivity modulation type mosfet |
-
1987
- 1987-07-10 JP JP17228987A patent/JPS6417476A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63127572A (en) * | 1986-11-17 | 1988-05-31 | Nissan Motor Co Ltd | Conductivity modulation type mosfet |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5323059A (en) * | 1991-05-06 | 1994-06-21 | Motorola, Inc. | Vertical current flow semiconductor device utilizing wafer bonding |
US5841197A (en) * | 1994-11-18 | 1998-11-24 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
JPH1012628A (en) * | 1996-06-20 | 1998-01-16 | Nec Corp | Semiconductor substrate, its manufacture, and semiconductor device |
US6124179A (en) * | 1996-09-05 | 2000-09-26 | Adamic, Jr.; Fred W. | Inverted dielectric isolation process |
JPWO2012056536A1 (en) * | 2010-10-27 | 2014-03-20 | 富士電機株式会社 | Semiconductor device and manufacturing method of semiconductor device |
US9070737B2 (en) | 2010-10-27 | 2015-06-30 | Fuji Electric Co., Ltd. | Semiconductor device with low-lifetime region |
US9460927B2 (en) | 2010-10-27 | 2016-10-04 | Fuji Electric Co., Ltd. | Semiconductor device manufacturing method |
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