JPS6411984B2 - - Google Patents
Info
- Publication number
- JPS6411984B2 JPS6411984B2 JP15229483A JP15229483A JPS6411984B2 JP S6411984 B2 JPS6411984 B2 JP S6411984B2 JP 15229483 A JP15229483 A JP 15229483A JP 15229483 A JP15229483 A JP 15229483A JP S6411984 B2 JPS6411984 B2 JP S6411984B2
- Authority
- JP
- Japan
- Prior art keywords
- main
- sub
- processor unit
- bus
- command
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15229483A JPS6043770A (ja) | 1983-08-19 | 1983-08-19 | サブ・プロセツサ・ユニツト通信方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15229483A JPS6043770A (ja) | 1983-08-19 | 1983-08-19 | サブ・プロセツサ・ユニツト通信方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6043770A JPS6043770A (ja) | 1985-03-08 |
| JPS6411984B2 true JPS6411984B2 (OSRAM) | 1989-02-28 |
Family
ID=15537381
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15229483A Granted JPS6043770A (ja) | 1983-08-19 | 1983-08-19 | サブ・プロセツサ・ユニツト通信方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6043770A (OSRAM) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62260263A (ja) * | 1986-05-07 | 1987-11-12 | Fujitsu Ltd | マルチプロセツサによるプログラム制御方式 |
| JP2006280474A (ja) * | 2005-03-31 | 2006-10-19 | Daiman:Kk | 遊技機における払出制御技術 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5539908A (en) * | 1978-08-26 | 1980-03-21 | Hitachi Denshi Ltd | Control system of multi-processor system |
| JPS5667471A (en) * | 1979-11-02 | 1981-06-06 | Mitsubishi Electric Corp | Multiprocessor |
| JPS5731072A (en) * | 1980-07-31 | 1982-02-19 | Mitsubishi Electric Corp | Multiprocessor |
-
1983
- 1983-08-19 JP JP15229483A patent/JPS6043770A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6043770A (ja) | 1985-03-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0354375B2 (OSRAM) | ||
| JPS648387B2 (OSRAM) | ||
| JPS6411984B2 (OSRAM) | ||
| JP3531368B2 (ja) | コンピュータシステム及びバス間制御回路 | |
| JP3240863B2 (ja) | 調停回路 | |
| JPH09114670A (ja) | パワーオン初期化を有する情報処理システム | |
| JPH0131225B2 (OSRAM) | ||
| JP3028998B2 (ja) | Dma転送回路 | |
| JP2599184B2 (ja) | Dmacのリード転送制御装置 | |
| JPH01144151A (ja) | 情報処理装置 | |
| JP2501393B2 (ja) | 直接メモリアクセス装置 | |
| JPS5999522A (ja) | 入出力制御方式 | |
| JP2982301B2 (ja) | コンピュータ装置 | |
| JPH06161947A (ja) | コンピュータシステム | |
| JPS6215903B2 (OSRAM) | ||
| JPH053018B2 (OSRAM) | ||
| JPH02220162A (ja) | 計算機用dma転送装置 | |
| JPS6194167A (ja) | 周辺制御装置 | |
| JPH0635809A (ja) | パーソナルコンピュータのオプションカード | |
| JPH0575140B2 (OSRAM) | ||
| JPS642985B2 (OSRAM) | ||
| JPH0337544U (OSRAM) | ||
| JPH07504050A (ja) | コンピュータ化データ採取用周辺i/oバス及びプログラム可能バスインターフェース | |
| JPS57130137A (en) | Data processor | |
| JPS5836453U (ja) | マルチ計算機システムにおけるプログラム動作メモリの有効活用機構 |