JPS6367337B2 - - Google Patents

Info

Publication number
JPS6367337B2
JPS6367337B2 JP58065181A JP6518183A JPS6367337B2 JP S6367337 B2 JPS6367337 B2 JP S6367337B2 JP 58065181 A JP58065181 A JP 58065181A JP 6518183 A JP6518183 A JP 6518183A JP S6367337 B2 JPS6367337 B2 JP S6367337B2
Authority
JP
Japan
Prior art keywords
lead
solder
semiconductor chip
lead frame
solder clad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58065181A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59191360A (ja
Inventor
Iwami Abiko
Toyohiko Nakamura
Norio Okutsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Americas Corp
Original Assignee
International Rectifier Corp USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Rectifier Corp USA filed Critical International Rectifier Corp USA
Priority to JP58065181A priority Critical patent/JPS59191360A/ja
Publication of JPS59191360A publication Critical patent/JPS59191360A/ja
Publication of JPS6367337B2 publication Critical patent/JPS6367337B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
JP58065181A 1983-04-15 1983-04-15 半導体装置用リードフレーム Granted JPS59191360A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58065181A JPS59191360A (ja) 1983-04-15 1983-04-15 半導体装置用リードフレーム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58065181A JPS59191360A (ja) 1983-04-15 1983-04-15 半導体装置用リードフレーム

Publications (2)

Publication Number Publication Date
JPS59191360A JPS59191360A (ja) 1984-10-30
JPS6367337B2 true JPS6367337B2 (enFirst) 1988-12-26

Family

ID=13279481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58065181A Granted JPS59191360A (ja) 1983-04-15 1983-04-15 半導体装置用リードフレーム

Country Status (1)

Country Link
JP (1) JPS59191360A (enFirst)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61206247A (ja) * 1985-03-11 1986-09-12 Toshiba Corp 半導体装置用リ−ドフレ−ム
DE10258035A1 (de) * 2002-12-12 2004-06-24 Robert Bosch Gmbh Einphasiges Stromrichtermodul
CN103023001A (zh) * 2011-09-28 2013-04-03 江苏锦丰电子有限公司 浪涌保护器用条带

Also Published As

Publication number Publication date
JPS59191360A (ja) 1984-10-30

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