JPS6356723B2 - - Google Patents

Info

Publication number
JPS6356723B2
JPS6356723B2 JP55086314A JP8631480A JPS6356723B2 JP S6356723 B2 JPS6356723 B2 JP S6356723B2 JP 55086314 A JP55086314 A JP 55086314A JP 8631480 A JP8631480 A JP 8631480A JP S6356723 B2 JPS6356723 B2 JP S6356723B2
Authority
JP
Japan
Prior art keywords
circuit
output
current
logic
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55086314A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5711535A (en
Inventor
Akira Aso
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP8631480A priority Critical patent/JPS5711535A/ja
Publication of JPS5711535A publication Critical patent/JPS5711535A/ja
Publication of JPS6356723B2 publication Critical patent/JPS6356723B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
    • H03K3/0233—Bistable circuits
    • H03K3/02337—Bistables with hysteresis, e.g. Schmitt trigger

Landscapes

  • Logic Circuits (AREA)
JP8631480A 1980-06-25 1980-06-25 Integrated logical circuit Granted JPS5711535A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8631480A JPS5711535A (en) 1980-06-25 1980-06-25 Integrated logical circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8631480A JPS5711535A (en) 1980-06-25 1980-06-25 Integrated logical circuit

Publications (2)

Publication Number Publication Date
JPS5711535A JPS5711535A (en) 1982-01-21
JPS6356723B2 true JPS6356723B2 (en, 2012) 1988-11-09

Family

ID=13883366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8631480A Granted JPS5711535A (en) 1980-06-25 1980-06-25 Integrated logical circuit

Country Status (1)

Country Link
JP (1) JPS5711535A (en, 2012)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60100818A (ja) * 1983-11-07 1985-06-04 Sumitomo Electric Ind Ltd ヒステリシス付きコンパレ−タ
JPH0786909A (ja) * 1993-06-30 1995-03-31 Nec Corp 半導体集積回路の出力回路

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5842969B2 (ja) * 1978-04-11 1983-09-22 三菱電機株式会社 シユミツトトリガ回路

Also Published As

Publication number Publication date
JPS5711535A (en) 1982-01-21

Similar Documents

Publication Publication Date Title
US7595661B2 (en) Low voltage differential signaling drivers including branches with series resistors
US7420387B2 (en) Semiconductor device capable of controlling OCD and ODT circuits and control method used by the semiconductor device
US5519728A (en) High-speed low-voltage differential swing transmission line transceiver
JP3788928B2 (ja) 抵抗可変器
JP5031258B2 (ja) 半導体装置におけるインピーダンス制御回路及びインピーダンス制御方法
US5939922A (en) Input circuit device with low power consumption
JP2007505556A (ja) レベル・シフター
JP2007124644A (ja) 電子回路、該電子回路として構成された差分送信機、及び、自己直列終端送信機を形成する方法（振幅制御、プリ・エンファシス制御及びスルー・レート制御のためのセグメント化と振幅精度及び高電圧保護のための電圧調整とを有する自己直列終端シリアル・リンク送信機）
US6285209B1 (en) Interface circuit and input buffer integrated circuit including the same
JP4676646B2 (ja) インピーダンス調整回路および半導体装置
EP0762290B1 (en) Input buffer circuit
US5880601A (en) Signal receiving circuit and digital signal processing system
US6657460B2 (en) Spatially filtered data bus drivers and receivers and method of operating same
JP4237402B2 (ja) 対称送信ライン駆動用出力バッファ
US6300795B1 (en) Multiple-bit, current mode data bus
US6504405B1 (en) Differential amplifier with selectable hysteresis and buffered filter
KR100431568B1 (ko) 고 저항 또는 고 커패시턴스 신호 라인용 저감 전압입력/저감 전압 출력 리피터 및 그 방법
JPS6356723B2 (en, 2012)
JPH0879047A (ja) 半導体集積回路およびその製造方法
US7078935B2 (en) Simultaneous bi-directional transceiver
JP3146829B2 (ja) 半導体集積回路
JPH0220171B2 (en, 2012)
US6373276B1 (en) CMOS small signal switchable impedence and voltage adjustable terminator with hysteresis receiver network
US20050168262A1 (en) High-speed receiver for high i/o voltage and low core voltage
KR20030022774A (ko) 높은 저항 또는 높은 용량 신호 라인을 위한 혼합 스윙전압 리피터와 이를 위한 방법