JPS5711535A - Integrated logical circuit - Google Patents
Integrated logical circuitInfo
- Publication number
- JPS5711535A JPS5711535A JP8631480A JP8631480A JPS5711535A JP S5711535 A JPS5711535 A JP S5711535A JP 8631480 A JP8631480 A JP 8631480A JP 8631480 A JP8631480 A JP 8631480A JP S5711535 A JPS5711535 A JP S5711535A
- Authority
- JP
- Japan
- Prior art keywords
- input
- point
- vin1
- level
- logical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/023—Generators characterised by the type of circuit or by the means used for producing pulses by the use of differential amplifiers or comparators, with internal or external positive feedback
- H03K3/0233—Bistable circuits
- H03K3/02337—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Logic Circuits (AREA)
Abstract
PURPOSE:To keep noise margin required for variance of external conditions easily, by giving a hysteresis to the input and output characteristics of gates according to the conditions, in an integrated logical circuit. CONSTITUTION:A reference voltage VRA1 of a current switching type logical gate G1 takes binary value to the logical operation of an input signal. Outputs 01, 02 of the gate G1 are connected to gates G2, G3, and output lines l1, l2 different in the phase are connected to the point (a), and when an input VIN1 is at low level, the output line l1 turns on, and the potential at the point (a) is Rri I2, and when the input VIN1 is at high level, the output line l2 turns on and the potential at the point (a) is Rri I3. If I2 I3, the VRA1 takes binary value depending on the level of the VIN1, the input and output characteristics of the G1 have a hysteresis, and when I2<I3, the noise margin of each logical level can be increased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8631480A JPS5711535A (en) | 1980-06-25 | 1980-06-25 | Integrated logical circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8631480A JPS5711535A (en) | 1980-06-25 | 1980-06-25 | Integrated logical circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5711535A true JPS5711535A (en) | 1982-01-21 |
JPS6356723B2 JPS6356723B2 (en) | 1988-11-09 |
Family
ID=13883366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8631480A Granted JPS5711535A (en) | 1980-06-25 | 1980-06-25 | Integrated logical circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5711535A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60100818A (en) * | 1983-11-07 | 1985-06-04 | Sumitomo Electric Ind Ltd | Comparator with hysteresis |
JPH0786909A (en) * | 1993-06-30 | 1995-03-31 | Nec Corp | Output circuit for semiconductor integrated circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54151360A (en) * | 1978-04-11 | 1979-11-28 | Mitsubishi Electric Corp | Schmitt trigger circuit |
-
1980
- 1980-06-25 JP JP8631480A patent/JPS5711535A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54151360A (en) * | 1978-04-11 | 1979-11-28 | Mitsubishi Electric Corp | Schmitt trigger circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60100818A (en) * | 1983-11-07 | 1985-06-04 | Sumitomo Electric Ind Ltd | Comparator with hysteresis |
JPH0786909A (en) * | 1993-06-30 | 1995-03-31 | Nec Corp | Output circuit for semiconductor integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6356723B2 (en) | 1988-11-09 |
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