JPS6333185B2 - - Google Patents

Info

Publication number
JPS6333185B2
JPS6333185B2 JP58157374A JP15737483A JPS6333185B2 JP S6333185 B2 JPS6333185 B2 JP S6333185B2 JP 58157374 A JP58157374 A JP 58157374A JP 15737483 A JP15737483 A JP 15737483A JP S6333185 B2 JPS6333185 B2 JP S6333185B2
Authority
JP
Japan
Prior art keywords
data
input
transfer
data buffer
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58157374A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6049458A (ja
Inventor
Osamu Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15737483A priority Critical patent/JPS6049458A/ja
Publication of JPS6049458A publication Critical patent/JPS6049458A/ja
Publication of JPS6333185B2 publication Critical patent/JPS6333185B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
JP15737483A 1983-08-29 1983-08-29 デ−タバッファ制御方式 Granted JPS6049458A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15737483A JPS6049458A (ja) 1983-08-29 1983-08-29 デ−タバッファ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15737483A JPS6049458A (ja) 1983-08-29 1983-08-29 デ−タバッファ制御方式

Publications (2)

Publication Number Publication Date
JPS6049458A JPS6049458A (ja) 1985-03-18
JPS6333185B2 true JPS6333185B2 (enrdf_load_stackoverflow) 1988-07-04

Family

ID=15648256

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15737483A Granted JPS6049458A (ja) 1983-08-29 1983-08-29 デ−タバッファ制御方式

Country Status (1)

Country Link
JP (1) JPS6049458A (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6325722A (ja) * 1986-07-18 1988-02-03 Matsushita Electric Ind Co Ltd Ｆｉｆｏ回路
JPS6429926A (en) * 1987-07-24 1989-01-31 Matsushita Electric Ind Co Ltd Fifo circuit
US4916658A (en) * 1987-12-18 1990-04-10 International Business Machines Corporation Dynamic buffer control
JP2669020B2 (ja) * 1988-12-19 1997-10-27 日本電気株式会社 データ転送装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51112140A (en) * 1975-03-27 1976-10-04 Yokogawa Hokushin Electric Corp Buffer register
JPS56105520A (en) * 1980-01-26 1981-08-22 Agency Of Ind Science & Technol Data transfer control unit

Also Published As

Publication number Publication date
JPS6049458A (ja) 1985-03-18

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