JPS6326899B2 - - Google Patents

Info

Publication number
JPS6326899B2
JPS6326899B2 JP57153002A JP15300282A JPS6326899B2 JP S6326899 B2 JPS6326899 B2 JP S6326899B2 JP 57153002 A JP57153002 A JP 57153002A JP 15300282 A JP15300282 A JP 15300282A JP S6326899 B2 JPS6326899 B2 JP S6326899B2
Authority
JP
Japan
Prior art keywords
circuit means
parallel
output
multiplier
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57153002A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5943442A (ja
Inventor
Susumu Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP57153002A priority Critical patent/JPS5943442A/ja
Publication of JPS5943442A publication Critical patent/JPS5943442A/ja
Publication of JPS6326899B2 publication Critical patent/JPS6326899B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/527—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
    • G06F7/5272—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
JP57153002A 1982-09-02 1982-09-02 デイジタル乗算器 Granted JPS5943442A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57153002A JPS5943442A (ja) 1982-09-02 1982-09-02 デイジタル乗算器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57153002A JPS5943442A (ja) 1982-09-02 1982-09-02 デイジタル乗算器

Publications (2)

Publication Number Publication Date
JPS5943442A JPS5943442A (ja) 1984-03-10
JPS6326899B2 true JPS6326899B2 (de) 1988-06-01

Family

ID=15552794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57153002A Granted JPS5943442A (ja) 1982-09-02 1982-09-02 デイジタル乗算器

Country Status (1)

Country Link
JP (1) JPS5943442A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5390135A (en) * 1993-11-29 1995-02-14 Hewlett-Packard Parallel shift and add circuit and method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447539A (en) * 1977-09-22 1979-04-14 Nippon Telegr & Teleph Corp <Ntt> Digital binary multiplier circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447539A (en) * 1977-09-22 1979-04-14 Nippon Telegr & Teleph Corp <Ntt> Digital binary multiplier circuit

Also Published As

Publication number Publication date
JPS5943442A (ja) 1984-03-10

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