JPS63244747A - 樹脂封止型集積回路装置及びその製造方法 - Google Patents

樹脂封止型集積回路装置及びその製造方法

Info

Publication number
JPS63244747A
JPS63244747A JP62078550A JP7855087A JPS63244747A JP S63244747 A JPS63244747 A JP S63244747A JP 62078550 A JP62078550 A JP 62078550A JP 7855087 A JP7855087 A JP 7855087A JP S63244747 A JPS63244747 A JP S63244747A
Authority
JP
Japan
Prior art keywords
integrated circuit
resin
conductor wiring
circuit device
wire
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62078550A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0511660B2 (enrdf_load_stackoverflow
Inventor
Hiromichi Sawatani
沢谷 博道
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62078550A priority Critical patent/JPS63244747A/ja
Priority to KR1019880003591A priority patent/KR910001419B1/ko
Publication of JPS63244747A publication Critical patent/JPS63244747A/ja
Priority to US07/506,251 priority patent/US5083189A/en
Publication of JPH0511660B2 publication Critical patent/JPH0511660B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP62078550A 1987-03-31 1987-03-31 樹脂封止型集積回路装置及びその製造方法 Granted JPS63244747A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62078550A JPS63244747A (ja) 1987-03-31 1987-03-31 樹脂封止型集積回路装置及びその製造方法
KR1019880003591A KR910001419B1 (ko) 1987-03-31 1988-03-31 수지봉합형 집적회로장치
US07/506,251 US5083189A (en) 1987-03-31 1990-04-09 Resin-sealed type IC device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62078550A JPS63244747A (ja) 1987-03-31 1987-03-31 樹脂封止型集積回路装置及びその製造方法

Publications (2)

Publication Number Publication Date
JPS63244747A true JPS63244747A (ja) 1988-10-12
JPH0511660B2 JPH0511660B2 (enrdf_load_stackoverflow) 1993-02-16

Family

ID=13665025

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62078550A Granted JPS63244747A (ja) 1987-03-31 1987-03-31 樹脂封止型集積回路装置及びその製造方法

Country Status (1)

Country Link
JP (1) JPS63244747A (enrdf_load_stackoverflow)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09232500A (ja) * 1996-02-23 1997-09-05 Nec Corp マルチチップ半導体装置
JP2009059759A (ja) * 2007-08-30 2009-03-19 Asmo Co Ltd 樹脂封止型半導体装置
CN102460667A (zh) * 2009-06-08 2012-05-16 松下电器产业株式会社 电子部件安装结构体的制造方法以及电子部件安装结构体
US9324639B2 (en) 2014-07-03 2016-04-26 Stmicroelectronics S.R.L. Electronic device comprising an improved lead frame
WO2022042998A1 (en) 2020-08-27 2022-03-03 Hitachi Energy Switzerland Ag Power semiconductor module and manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52120549U (enrdf_load_stackoverflow) * 1975-10-20 1977-09-13
JPS6130067A (ja) * 1984-07-23 1986-02-12 Nec Kansai Ltd ハイブリツドic

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52120549U (enrdf_load_stackoverflow) * 1975-10-20 1977-09-13
JPS6130067A (ja) * 1984-07-23 1986-02-12 Nec Kansai Ltd ハイブリツドic

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09232500A (ja) * 1996-02-23 1997-09-05 Nec Corp マルチチップ半導体装置
JP2009059759A (ja) * 2007-08-30 2009-03-19 Asmo Co Ltd 樹脂封止型半導体装置
CN102460667A (zh) * 2009-06-08 2012-05-16 松下电器产业株式会社 电子部件安装结构体的制造方法以及电子部件安装结构体
US9324639B2 (en) 2014-07-03 2016-04-26 Stmicroelectronics S.R.L. Electronic device comprising an improved lead frame
WO2022042998A1 (en) 2020-08-27 2022-03-03 Hitachi Energy Switzerland Ag Power semiconductor module and manufacturing method
DE212021000445U1 (de) 2020-08-27 2023-06-07 Hitachi Energy Switzerland Ag Leistungshalbleitermodul

Also Published As

Publication number Publication date
JPH0511660B2 (enrdf_load_stackoverflow) 1993-02-16

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Legal Events

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