JPS63223943A - ダイレクトメモリアクセス制御装置 - Google Patents

ダイレクトメモリアクセス制御装置

Info

Publication number
JPS63223943A
JPS63223943A JP5861987A JP5861987A JPS63223943A JP S63223943 A JPS63223943 A JP S63223943A JP 5861987 A JP5861987 A JP 5861987A JP 5861987 A JP5861987 A JP 5861987A JP S63223943 A JPS63223943 A JP S63223943A
Authority
JP
Japan
Prior art keywords
data
channel data
address
control
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5861987A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0564820B2 (enExample
Inventor
Takashi Hagiwara
萩原　孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5861987A priority Critical patent/JPS63223943A/ja
Publication of JPS63223943A publication Critical patent/JPS63223943A/ja
Publication of JPH0564820B2 publication Critical patent/JPH0564820B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP5861987A 1987-03-13 1987-03-13 ダイレクトメモリアクセス制御装置 Granted JPS63223943A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5861987A JPS63223943A (ja) 1987-03-13 1987-03-13 ダイレクトメモリアクセス制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5861987A JPS63223943A (ja) 1987-03-13 1987-03-13 ダイレクトメモリアクセス制御装置

Publications (2)

Publication Number Publication Date
JPS63223943A true JPS63223943A (ja) 1988-09-19
JPH0564820B2 JPH0564820B2 (enExample) 1993-09-16

Family

ID=13089577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5861987A Granted JPS63223943A (ja) 1987-03-13 1987-03-13 ダイレクトメモリアクセス制御装置

Country Status (1)

Country Link
JP (1) JPS63223943A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0285948A (ja) * 1988-09-22 1990-03-27 Fujitsu Ltd 直接記憶アクセス制御方式
JP2002202948A (ja) * 2000-12-28 2002-07-19 Mega Chips Corp データ転送回路およびデータ転送方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57103526A (en) * 1980-12-19 1982-06-28 Fujitsu Ltd Interruption controlling system
JPS5814235A (ja) * 1981-07-20 1983-01-27 Fujitsu Ltd 磁気バブルメモリ装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57103526A (en) * 1980-12-19 1982-06-28 Fujitsu Ltd Interruption controlling system
JPS5814235A (ja) * 1981-07-20 1983-01-27 Fujitsu Ltd 磁気バブルメモリ装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0285948A (ja) * 1988-09-22 1990-03-27 Fujitsu Ltd 直接記憶アクセス制御方式
JP2002202948A (ja) * 2000-12-28 2002-07-19 Mega Chips Corp データ転送回路およびデータ転送方法

Also Published As

Publication number Publication date
JPH0564820B2 (enExample) 1993-09-16

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