JPS63191647U - - Google Patents

Info

Publication number
JPS63191647U
JPS63191647U JP1987082912U JP8291287U JPS63191647U JP S63191647 U JPS63191647 U JP S63191647U JP 1987082912 U JP1987082912 U JP 1987082912U JP 8291287 U JP8291287 U JP 8291287U JP S63191647 U JPS63191647 U JP S63191647U
Authority
JP
Japan
Prior art keywords
lead
semiconductor chip
insulating layer
insulator
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987082912U
Other languages
English (en)
Other versions
JPH0526759Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987082912U priority Critical patent/JPH0526759Y2/ja
Publication of JPS63191647U publication Critical patent/JPS63191647U/ja
Application granted granted Critical
Publication of JPH0526759Y2 publication Critical patent/JPH0526759Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Description

【図面の簡単な説明】
第１図は本考案の実施例に係わる発光ダイオー
ドの断面図、第２図は第１図の発光ダイオードの
樹脂封止体を設ける前の状態を示す斜視図、第３
図は第１図の発光ダイオードを回路基板に取り付
けた状態を示す断面図、第４図は従来の発光ダイ
オードを示す断面図、第５図は第４図の発光ダイ
オードを回路基板に取り付けた状態を示す断面図
、第６図は本考案の別の実施例の発光ダイオード
を示す断面図である。 １……発光ダイオードチツプ、２，３……電極
、５……第１のリード、６……第２のリード、７
……リード細線、８……樹脂封止体、９……回路
基板、１２……絶縁層。

Claims (1)

  1. 【実用新案登録請求の範囲】 〔１〕 一方及び他方の主面に電極２，３をそれ
    ぞれ有する半導体ツプ１と、 前記半導体チツプ１の前記一方の主面の電極２
    に電気的及び機械的に結合されている第１のリー
    ド５と、 前記第１のリード５に絶縁層１２又は絶縁層１
    ２と変形し難い中間部材１５との組み合わせを介
    して固着され、前記第１のリード５とは反対の方
    向に導出されている第２のリード６と、 前記半導体チツプ１の前記他方の主面に電極３
    を前記第２のリード６に電気的に接続するリード
    細線７と、 前記半導体チツプ１、前記第１及び第２のリー
    ドの一端部５ａ，６ａ、前記絶縁層１２又は前記
    絶縁層１２と前記中間部材１５との組み合わせ及
    び前記リード細線７を被覆し、前記第１及び第２
    のリードの他端部５ｂ，６ｂは被覆しない絶縁物
    封止体８とから成る絶縁物封止型半導体装置。 〔２〕 前記半導体チツプ１は発光ダイオードチ
    ツプである実用新案登録請求の範囲第１項記載の
    絶縁物封止型半導体装置。 〔３〕 前記絶縁層１２はポリイミド系樹脂の層
    である実用新案登録請求の範囲第１項又は第２項
    記載の絶縁物封止型半導体装置。
JP1987082912U 1987-05-29 1987-05-29 Expired - Lifetime JPH0526759Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987082912U JPH0526759Y2 (ja) 1987-05-29 1987-05-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987082912U JPH0526759Y2 (ja) 1987-05-29 1987-05-29

Publications (2)

Publication Number Publication Date
JPS63191647U true JPS63191647U (ja) 1988-12-09
JPH0526759Y2 JPH0526759Y2 (ja) 1993-07-07

Family

ID=30936002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987082912U Expired - Lifetime JPH0526759Y2 (ja) 1987-05-29 1987-05-29

Country Status (1)

Country Link
JP (1) JPH0526759Y2 (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01273367A (ja) * 1988-04-26 1989-11-01 Iwasaki Electric Co Ltd 発光ダイオード
JPH0311771A (ja) * 1989-05-31 1991-01-21 Siemens Ag 表面実装可能なオプトデバイス
JPH08298345A (ja) * 1995-04-26 1996-11-12 Shichizun Denshi:Kk チップ型発光ダイオード
WO2004093204A1 (ja) * 2003-04-16 2004-10-28 Tabuchi Electric Co., Ltd. 反射型発光ダイオード
WO2012108011A1 (ja) * 2011-02-09 2012-08-16 三菱電機株式会社 パワー半導体モジュール

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5614585U (ja) * 1979-07-16 1981-02-07
JPS5950762A (ja) * 1982-09-01 1984-03-23 パワトロン・デイビジヨン・オブ・コントラヴエス・ゴ−ツ・コ−ポレイシヨン 永久磁石直流機およびその管状フレ−ム

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5614585B2 (ja) * 1972-07-21 1981-04-04

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5614585U (ja) * 1979-07-16 1981-02-07
JPS5950762A (ja) * 1982-09-01 1984-03-23 パワトロン・デイビジヨン・オブ・コントラヴエス・ゴ−ツ・コ−ポレイシヨン 永久磁石直流機およびその管状フレ−ム

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01273367A (ja) * 1988-04-26 1989-11-01 Iwasaki Electric Co Ltd 発光ダイオード
JPH0311771A (ja) * 1989-05-31 1991-01-21 Siemens Ag 表面実装可能なオプトデバイス
JPH08298345A (ja) * 1995-04-26 1996-11-12 Shichizun Denshi:Kk チップ型発光ダイオード
WO2004093204A1 (ja) * 2003-04-16 2004-10-28 Tabuchi Electric Co., Ltd. 反射型発光ダイオード
CN100394618C (zh) * 2003-04-16 2008-06-11 株式会社珍珠电球制作所 反射型发光二极管
WO2012108011A1 (ja) * 2011-02-09 2012-08-16 三菱電機株式会社 パワー半導体モジュール
JP5669866B2 (ja) * 2011-02-09 2015-02-18 三菱電機株式会社 パワー半導体モジュール
US9129949B2 (en) 2011-02-09 2015-09-08 Mitsubishi Electric Corporation Power semiconductor module

Also Published As

Publication number Publication date
JPH0526759Y2 (ja) 1993-07-07

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