JPS6311787B2 - - Google Patents

Info

Publication number
JPS6311787B2
JPS6311787B2 JP57110559A JP11055982A JPS6311787B2 JP S6311787 B2 JPS6311787 B2 JP S6311787B2 JP 57110559 A JP57110559 A JP 57110559A JP 11055982 A JP11055982 A JP 11055982A JP S6311787 B2 JPS6311787 B2 JP S6311787B2
Authority
JP
Japan
Prior art keywords
substrate
conductor
forming
insulating layer
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57110559A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5848470A (ja
Inventor
Boido Ruuzunaa Buruusu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YUNISHISU CORP
Original Assignee
YUNISHISU CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by YUNISHISU CORP filed Critical YUNISHISU CORP
Publication of JPS5848470A publication Critical patent/JPS5848470A/ja
Publication of JPS6311787B2 publication Critical patent/JPS6311787B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/87—FETs having Schottky gate electrodes, e.g. metal-semiconductor FETs [MESFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/061—Manufacture or treatment of FETs having Schottky gates
    • H10D30/0612—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs
    • H10D30/0616—Manufacture or treatment of FETs having Schottky gates of lateral single-gate Schottky FETs using processes wherein the final gate is made before the completion of the source and drain regions, e.g. gate-first processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10P32/1414—
    • H10P32/171—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/018—Compensation doping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/082—Ion implantation FETs/COMs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/088—J-Fet, i.e. junction field effect transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/147—Silicides

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Engineering & Computer Science (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP57110559A 1981-08-31 1982-06-24 金属半導体電界効果トランジスタの製造方法 Granted JPS5848470A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US297786 1981-08-31
US06/297,786 US4358891A (en) 1979-06-22 1981-08-31 Method of forming a metal semiconductor field effect transistor

Publications (2)

Publication Number Publication Date
JPS5848470A JPS5848470A (ja) 1983-03-22
JPS6311787B2 true JPS6311787B2 (cg-RX-API-DMAC10.html) 1988-03-16

Family

ID=23147740

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57110559A Granted JPS5848470A (ja) 1981-08-31 1982-06-24 金属半導体電界効果トランジスタの製造方法

Country Status (4)

Country Link
US (1) US4358891A (cg-RX-API-DMAC10.html)
EP (1) EP0073697B1 (cg-RX-API-DMAC10.html)
JP (1) JPS5848470A (cg-RX-API-DMAC10.html)
DE (1) DE3278705D1 (cg-RX-API-DMAC10.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01320192A (ja) * 1988-06-22 1989-12-26 Gijutsu Shinbunsha:Kk Ｃｄ及びｃｄを挿入した雑誌

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4414737A (en) * 1981-01-30 1983-11-15 Tokyo Shibaura Denki Kabushiki Kaisha Production of Schottky barrier diode
US4545114A (en) * 1982-09-30 1985-10-08 Fujitsu Limited Method of producing semiconductor device
JPS59154040A (ja) * 1983-02-22 1984-09-03 Toshiba Corp 半導体装置の製造方法
JPS59161875A (ja) * 1983-03-04 1984-09-12 Nec Corp ３−ｖ化合物半導体装置
US4486946A (en) * 1983-07-12 1984-12-11 Control Data Corporation Method for using titanium-tungsten alloy as a barrier metal in silicon semiconductor processing
FR2568723B1 (fr) * 1984-08-03 1987-06-05 Commissariat Energie Atomique Circuit integre notamment de type mos et son procede de fabrication
JPH0793317B2 (ja) * 1984-10-11 1995-10-09 日本電信電話株式会社 半導体装置の製造方法
US5021840A (en) * 1987-08-18 1991-06-04 Texas Instruments Incorporated Schottky or PN diode with composite sidewall
US4987318A (en) * 1989-09-18 1991-01-22 International Business Machines Corporation High level clamp driver for wire-or buses
US5208170A (en) * 1991-09-18 1993-05-04 International Business Machines Corporation Method for fabricating bipolar and CMOS devices in integrated circuits using contact metallization for local interconnect and via landing
US5888890A (en) * 1994-08-12 1999-03-30 Lg Semicon Co., Ltd. Method of manufacturing field effect transistor
JPH08172102A (ja) * 1994-12-20 1996-07-02 Murata Mfg Co Ltd 半導体装置の製造方法
US6956274B2 (en) * 2002-01-11 2005-10-18 Analog Devices, Inc. TiW platinum interconnect and method of making the same
US20030194872A1 (en) * 2002-04-16 2003-10-16 Applied Materials, Inc. Copper interconnect with sidewall copper-copper contact between metal and via
US8435873B2 (en) * 2006-06-08 2013-05-07 Texas Instruments Incorporated Unguarded Schottky barrier diodes with dielectric underetch at silicide interface
JP5400806B2 (ja) * 2008-02-28 2014-01-29 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． 半導体基板接続ビア

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3804681A (en) * 1967-04-18 1974-04-16 Ibm Method for making a schottky-barrier field effect transistor
US3639186A (en) * 1969-02-24 1972-02-01 Ibm Process for the production of finely etched patterns
JPS4859781A (cg-RX-API-DMAC10.html) * 1971-11-25 1973-08-22
JPS4953780A (cg-RX-API-DMAC10.html) * 1972-09-28 1974-05-24
US3906540A (en) * 1973-04-02 1975-09-16 Nat Semiconductor Corp Metal-silicide Schottky diode employing an aluminum connector
US4045248A (en) * 1973-06-26 1977-08-30 U.S. Philips Corporation Making Schottky barrier devices
JPS5644582B2 (cg-RX-API-DMAC10.html) * 1973-08-13 1981-10-20
IT1041193B (it) * 1975-08-08 1980-01-10 Selenia Ind Elettroniche Perfezionamenti nei procedimenti per la fabbricazione di dispositivi a semiconduttor
US4135998A (en) * 1978-04-26 1979-01-23 International Business Machines Corp. Method for forming pt-si schottky barrier contact
US4253229A (en) * 1978-04-27 1981-03-03 Xerox Corporation Self-aligned narrow gate MESFET process
US4304042A (en) * 1978-11-13 1981-12-08 Xerox Corporation Self-aligned MESFETs having reduced series resistance
US4305760A (en) * 1978-12-22 1981-12-15 Ncr Corporation Polysilicon-to-substrate contact processing

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01320192A (ja) * 1988-06-22 1989-12-26 Gijutsu Shinbunsha:Kk Ｃｄ及びｃｄを挿入した雑誌

Also Published As

Publication number Publication date
EP0073697B1 (en) 1988-06-22
JPS5848470A (ja) 1983-03-22
DE3278705D1 (en) 1988-07-28
US4358891A (en) 1982-11-16
EP0073697A3 (en) 1984-10-24
EP0073697A2 (en) 1983-03-09

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