JPS6259343B2 - - Google Patents

Info

Publication number
JPS6259343B2
JPS6259343B2 JP56213481A JP21348181A JPS6259343B2 JP S6259343 B2 JPS6259343 B2 JP S6259343B2 JP 56213481 A JP56213481 A JP 56213481A JP 21348181 A JP21348181 A JP 21348181A JP S6259343 B2 JPS6259343 B2 JP S6259343B2
Authority
JP
Japan
Prior art keywords
address
register
communication control
program
interrupt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56213481A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58115534A (ja
Inventor
Takeshi Nakayama
Kenichiro Kunikata
Naohiro Masunaga
Mitsuhiro Koba
Koyo Nakagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56213481A priority Critical patent/JPS58115534A/ja
Publication of JPS58115534A publication Critical patent/JPS58115534A/ja
Publication of JPS6259343B2 publication Critical patent/JPS6259343B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
JP56213481A 1981-12-29 1981-12-29 通信制御装置 Granted JPS58115534A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56213481A JPS58115534A (ja) 1981-12-29 1981-12-29 通信制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56213481A JPS58115534A (ja) 1981-12-29 1981-12-29 通信制御装置

Publications (2)

Publication Number Publication Date
JPS58115534A JPS58115534A (ja) 1983-07-09
JPS6259343B2 true JPS6259343B2 (enrdf_load_stackoverflow) 1987-12-10

Family

ID=16639908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56213481A Granted JPS58115534A (ja) 1981-12-29 1981-12-29 通信制御装置

Country Status (1)

Country Link
JP (1) JPS58115534A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS58115534A (ja) 1983-07-09

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