JPS6315626B2 - - Google Patents

Info

Publication number
JPS6315626B2
JPS6315626B2 JP4987583A JP4987583A JPS6315626B2 JP S6315626 B2 JPS6315626 B2 JP S6315626B2 JP 4987583 A JP4987583 A JP 4987583A JP 4987583 A JP4987583 A JP 4987583A JP S6315626 B2 JPS6315626 B2 JP S6315626B2
Authority
JP
Japan
Prior art keywords
circuit
signal line
logic
control information
processors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4987583A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59174962A (ja
Inventor
Yoshinori Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4987583A priority Critical patent/JPS59174962A/ja
Publication of JPS59174962A publication Critical patent/JPS59174962A/ja
Publication of JPS6315626B2 publication Critical patent/JPS6315626B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Multi Processors (AREA)
JP4987583A 1983-03-25 1983-03-25 メモリアクセス制御方式 Granted JPS59174962A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4987583A JPS59174962A (ja) 1983-03-25 1983-03-25 メモリアクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4987583A JPS59174962A (ja) 1983-03-25 1983-03-25 メモリアクセス制御方式

Publications (2)

Publication Number Publication Date
JPS59174962A JPS59174962A (ja) 1984-10-03
JPS6315626B2 true JPS6315626B2 (enrdf_load_stackoverflow) 1988-04-05

Family

ID=12843216

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4987583A Granted JPS59174962A (ja) 1983-03-25 1983-03-25 メモリアクセス制御方式

Country Status (1)

Country Link
JP (1) JPS59174962A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63301974A (ja) * 1987-06-01 1988-12-08 Minolta Camera Co Ltd 画像形成装置の表示装置
JP2874488B2 (ja) * 1992-10-30 1999-03-24 富士通株式会社 処理装置

Also Published As

Publication number Publication date
JPS59174962A (ja) 1984-10-03

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