JPS6243210B2 - - Google Patents

Info

Publication number
JPS6243210B2
JPS6243210B2 JP56060307A JP6030781A JPS6243210B2 JP S6243210 B2 JPS6243210 B2 JP S6243210B2 JP 56060307 A JP56060307 A JP 56060307A JP 6030781 A JP6030781 A JP 6030781A JP S6243210 B2 JPS6243210 B2 JP S6243210B2
Authority
JP
Japan
Prior art keywords
signal
circuit
input
turned
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56060307A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57174730A (en
Inventor
Shuichi Akimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56060307A priority Critical patent/JPS57174730A/ja
Publication of JPS57174730A publication Critical patent/JPS57174730A/ja
Publication of JPS6243210B2 publication Critical patent/JPS6243210B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/02—Input arrangements using manually operated switches, e.g. using keyboards or dials
    • G06F3/0227—Cooperation and interconnection of the input arrangement with other functional units of a computer

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Input From Keyboards Or The Like (AREA)
JP56060307A 1981-04-21 1981-04-21 Digital input circuit system of instantaneous input type Granted JPS57174730A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56060307A JPS57174730A (en) 1981-04-21 1981-04-21 Digital input circuit system of instantaneous input type

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56060307A JPS57174730A (en) 1981-04-21 1981-04-21 Digital input circuit system of instantaneous input type

Publications (2)

Publication Number Publication Date
JPS57174730A JPS57174730A (en) 1982-10-27
JPS6243210B2 true JPS6243210B2 (enExample) 1987-09-11

Family

ID=13138365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56060307A Granted JPS57174730A (en) 1981-04-21 1981-04-21 Digital input circuit system of instantaneous input type

Country Status (1)

Country Link
JP (1) JPS57174730A (enExample)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5927932B2 (ja) * 1976-09-13 1984-07-09 カシオ計算機株式会社 キ−入力方式

Also Published As

Publication number Publication date
JPS57174730A (en) 1982-10-27

Similar Documents

Publication Publication Date Title
US4429300A (en) High speed shift register circuit
GB1396923A (en) Data communication system
US4755817A (en) Data transmission system having transmission intervals which are adjustable for data words of various lengths
JPS6243210B2 (enExample)
JP3134449B2 (ja) シリアル・パラレル変換回路
JPS59229779A (ja) 直・並・直形集積メモリ回路
US4231023A (en) Binary to ternary converter
JPS5843934B2 (ja) シンゴウヘンカンソウチ
JP3909509B2 (ja) シリアルインタフェース回路
US5577005A (en) Circuit for using chip information
JP2513179B2 (ja) カウンタ付直列−並列変換回路
SU1651383A1 (ru) Преобразователь биимпульсного кода в бинарный
SU1160589A1 (ru) Частотный модул тор
JPH0625064Y2 (ja) 多値論理ドライバ
JPH02218243A (ja) デジタルデータ転送方式
KR950007106B1 (ko) 외부 pwm 포트 확장 회로
JPH0773212B2 (ja) Ａ／ｄコンバ−タ
JPS5935048B2 (ja) タイミング情報伝送方式
JP2504459B2 (ja) デジタル回線マルチドロツプ回路
SU1354191A1 (ru) Микропрограммное устройство управлени
KR870003924Y1 (ko) Vdp에서 정보 신호 선택회로
SU496550A1 (ru) Устройство многоканального ввода
JPH0566049B2 (enExample)
SU1300454A1 (ru) Устройство дл ввода-вывода аналоговой информации
SU1316051A1 (ru) Статический регистр