JPS6237939U - - Google Patents
Info
- Publication number
- JPS6237939U JPS6237939U JP1985130089U JP13008985U JPS6237939U JP S6237939 U JPS6237939 U JP S6237939U JP 1985130089 U JP1985130089 U JP 1985130089U JP 13008985 U JP13008985 U JP 13008985U JP S6237939 U JPS6237939 U JP S6237939U
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- conductive pattern
- component device
- substrate
- insulating adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 239000002245 particle Substances 0.000 claims 1
- 239000004642 Polyimide Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Description
第1図は本考案電子部品装置の一実施例を示す
断面図、第2図は本考案の一実施例の要部断面図
、第3図は本考案の一実施例で使用できるポリイ
ミド基板上の導電パターンの凸状部の形成工程図
、第4図〜第6図は夫々本考案の説明に供する線
図、第7図は従来例を示す断面図、第8図及び第
9図は夫々従来例の説明に供する線図、第10図
及び第11図は夫々従来例の要部拡大断面図であ
る。 1は半導体集積回路チツプ、2はボンデイング
パツド、3はパツシベーシヨン膜、4はポリイミ
ド基板、5は導電パターン、6は半田金属粒子、
7は絶縁性接着剤である。
断面図、第2図は本考案の一実施例の要部断面図
、第3図は本考案の一実施例で使用できるポリイ
ミド基板上の導電パターンの凸状部の形成工程図
、第4図〜第6図は夫々本考案の説明に供する線
図、第7図は従来例を示す断面図、第8図及び第
9図は夫々従来例の説明に供する線図、第10図
及び第11図は夫々従来例の要部拡大断面図であ
る。 1は半導体集積回路チツプ、2はボンデイング
パツド、3はパツシベーシヨン膜、4はポリイミ
ド基板、5は導電パターン、6は半田金属粒子、
7は絶縁性接着剤である。
Claims (1)
- 導電パターンが設けられた基板と該基板上に配
された電子部品とが導電性粒子を分散させた絶縁
性接着剤を介して接続されてなる電子部品装置に
おいて、上記導電パターンの上記電子部品の電極
との接続部分を凸状に形成したことを特徴とする
電子部品装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985130089U JPS6237939U (ja) | 1985-08-27 | 1985-08-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1985130089U JPS6237939U (ja) | 1985-08-27 | 1985-08-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6237939U true JPS6237939U (ja) | 1987-03-06 |
Family
ID=31027254
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1985130089U Pending JPS6237939U (ja) | 1985-08-27 | 1985-08-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6237939U (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01227444A (ja) * | 1988-03-07 | 1989-09-11 | Sharp Corp | 接続構造 |
WO1996036992A1 (en) * | 1995-05-18 | 1996-11-21 | Hitachi, Ltd. | Semiconductor device and its manufacture |
WO1996042107A1 (en) * | 1995-06-13 | 1996-12-27 | Hitachi Chemical Company, Ltd. | Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device |
JP2007150374A (ja) * | 1997-03-21 | 2007-06-14 | Seiko Epson Corp | 半導体装置及びフィルムキャリアテープ並びにこれらの製造方法 |
-
1985
- 1985-08-27 JP JP1985130089U patent/JPS6237939U/ja active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01227444A (ja) * | 1988-03-07 | 1989-09-11 | Sharp Corp | 接続構造 |
WO1996036992A1 (en) * | 1995-05-18 | 1996-11-21 | Hitachi, Ltd. | Semiconductor device and its manufacture |
WO1996042107A1 (en) * | 1995-06-13 | 1996-12-27 | Hitachi Chemical Company, Ltd. | Semiconductor device, wiring board for mounting semiconductor and method of production of semiconductor device |
US6223429B1 (en) | 1995-06-13 | 2001-05-01 | Hitachi Chemical Company, Ltd. | Method of production of semiconductor device |
JP2007150374A (ja) * | 1997-03-21 | 2007-06-14 | Seiko Epson Corp | 半導体装置及びフィルムキャリアテープ並びにこれらの製造方法 |
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