JPS6232550U - - Google Patents

Info

Publication number
JPS6232550U
JPS6232550U JP1985123353U JP12335385U JPS6232550U JP S6232550 U JPS6232550 U JP S6232550U JP 1985123353 U JP1985123353 U JP 1985123353U JP 12335385 U JP12335385 U JP 12335385U JP S6232550 U JPS6232550 U JP S6232550U
Authority
JP
Japan
Prior art keywords
electronic component
flexible substrate
component chip
metal layer
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985123353U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985123353U priority Critical patent/JPS6232550U/ja
Publication of JPS6232550U publication Critical patent/JPS6232550U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第１図は本考案電子部品装置の一実施例を示す
要部断面図、第２図及び第３図は夫々本考案の説
明に供する線図、第４図は従来例を示す要部断面
図、第５図及び第６図は夫々従来例の説明に供す
る線図である。 １は半導体集積回路チツプ、２はボンデイング
パツド、３は接着剤層、４は配線、５はポリイミ
ド基板、７は銅層である。

Claims (1)

    【実用新案登録請求の範囲】
  1. 樹脂よりなる可撓性基板と、該可撓性基板の一
    面に設けられた配線に接続された電子部品チツプ
    と、上記可撓性基板の他面の上部電子部品チツプ
    に対向する位置に設けられた金属層とよりなるこ
    とを特徴とする電子部品装置。
JP1985123353U 1985-08-09 1985-08-09 Pending JPS6232550U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985123353U JPS6232550U (ja) 1985-08-09 1985-08-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985123353U JPS6232550U (ja) 1985-08-09 1985-08-09

Publications (1)

Publication Number Publication Date
JPS6232550U true JPS6232550U (ja) 1987-02-26

Family

ID=31014381

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985123353U Pending JPS6232550U (ja) 1985-08-09 1985-08-09

Country Status (1)

Country Link
JP (1) JPS6232550U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006148072A (ja) * 2004-10-18 2006-06-08 Hitachi Chem Co Ltd 配線板
JP2006269502A (ja) * 2005-03-22 2006-10-05 Fujikura Ltd プリント配線基板及び電子回路装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006148072A (ja) * 2004-10-18 2006-06-08 Hitachi Chem Co Ltd 配線板
JP2006269502A (ja) * 2005-03-22 2006-10-05 Fujikura Ltd プリント配線基板及び電子回路装置
JP4592458B2 (ja) * 2005-03-22 2010-12-01 株式会社フジクラ プリント配線基板、電子回路装置及びその製造方法

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