JPH0265356U - - Google Patents
Info
- Publication number
- JPH0265356U JPH0265356U JP14406888U JP14406888U JPH0265356U JP H0265356 U JPH0265356 U JP H0265356U JP 14406888 U JP14406888 U JP 14406888U JP 14406888 U JP14406888 U JP 14406888U JP H0265356 U JPH0265356 U JP H0265356U
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- integrated circuit
- circuit device
- hybrid integrated
- sides
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 2
- 239000003990 capacitor Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第1図は本考案の実施例を示す両面部品搭載型
混成集積回路装置の断面図、第2図は本考案の他
の実施例を示す両面部品搭載型混成集積回路装置
の断面図、第3図は従来の両面部品搭載型混成集
積回路装置の断面図である。 1……絶縁基板、2……配線パターン、3,4
……半導体チツプ、5……ボンデイング・ワイヤ
(金線)、6……半田層、7……チツプ・コンデ
ンサ、8……プリコート樹脂、9……半導体チツ
プ・コンデンサ、10……モールド半導体装置。
混成集積回路装置の断面図、第2図は本考案の他
の実施例を示す両面部品搭載型混成集積回路装置
の断面図、第3図は従来の両面部品搭載型混成集
積回路装置の断面図である。 1……絶縁基板、2……配線パターン、3,4
……半導体チツプ、5……ボンデイング・ワイヤ
(金線)、6……半田層、7……チツプ・コンデ
ンサ、8……プリコート樹脂、9……半導体チツ
プ・コンデンサ、10……モールド半導体装置。
Claims (1)
- 絶縁基板と、前記絶縁基板の両面に設けられる
くぼみ内にそれぞれマウントされて収容される半
導体ベア・チツプとを含むことを特徴とする混成
集積回路装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14406888U JPH0265356U (ja) | 1988-11-02 | 1988-11-02 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14406888U JPH0265356U (ja) | 1988-11-02 | 1988-11-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0265356U true JPH0265356U (ja) | 1990-05-16 |
Family
ID=31411449
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14406888U Pending JPH0265356U (ja) | 1988-11-02 | 1988-11-02 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0265356U (ja) |
-
1988
- 1988-11-02 JP JP14406888U patent/JPH0265356U/ja active Pending