JPH01161330U - - Google Patents
Info
- Publication number
- JPH01161330U JPH01161330U JP5775088U JP5775088U JPH01161330U JP H01161330 U JPH01161330 U JP H01161330U JP 5775088 U JP5775088 U JP 5775088U JP 5775088 U JP5775088 U JP 5775088U JP H01161330 U JPH01161330 U JP H01161330U
- Authority
- JP
- Japan
- Prior art keywords
- conductive pattern
- region
- plating layer
- recognition mark
- wiring board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007747 plating Methods 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 claims 2
- 239000008188 pellet Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Description
第1図はこの考案の一実施例を示した平面図、
第2図はこの考案の認識マークの拡大平面図、第
3図はその縦断面図である。第4図及び第5図は
ハイブリツドICの具体例を示す平面図及び要部
縦断面図、第6図は配線パターンの縦断面図、第
7図は従来の認識マークの拡大平面である。 3……配線パターン、4……配線基板、11…
…認識マーク。
第2図はこの考案の認識マークの拡大平面図、第
3図はその縦断面図である。第4図及び第5図は
ハイブリツドICの具体例を示す平面図及び要部
縦断面図、第6図は配線パターンの縦断面図、第
7図は従来の認識マークの拡大平面である。 3……配線パターン、4……配線基板、11…
…認識マーク。
Claims (1)
- 【実用新案登録請求の範囲】 絶縁基板に導電パターンを形成し導電パターン
上にワイヤボンデイング性を良好にするメツキ層
を積層した配線基板上に、複数の半導体ペレツト
を含む電子部品をマウントしてワイヤボンデイン
グしたものにおいて、 上記導電パターンの一部にメツキ層が形成され
ていない領域を形成し、この領域を9イヤボンデ
イングの基準となる認識マークとしたことを特徴
とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5775088U JPH01161330U (ja) | 1988-04-28 | 1988-04-28 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5775088U JPH01161330U (ja) | 1988-04-28 | 1988-04-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01161330U true JPH01161330U (ja) | 1989-11-09 |
Family
ID=31283592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5775088U Pending JPH01161330U (ja) | 1988-04-28 | 1988-04-28 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01161330U (ja) |
-
1988
- 1988-04-28 JP JP5775088U patent/JPH01161330U/ja active Pending