JPS6236316B2 - - Google Patents

Info

Publication number
JPS6236316B2
JPS6236316B2 JP58016273A JP1627383A JPS6236316B2 JP S6236316 B2 JPS6236316 B2 JP S6236316B2 JP 58016273 A JP58016273 A JP 58016273A JP 1627383 A JP1627383 A JP 1627383A JP S6236316 B2 JPS6236316 B2 JP S6236316B2
Authority
JP
Japan
Prior art keywords
circuit
fuse
flip
flop
redundant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58016273A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59142800A (ja
Inventor
Masanobu Yoshida
Kyoyoshi Itano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58016273A priority Critical patent/JPS59142800A/ja
Priority to US06/574,728 priority patent/US4614881A/en
Priority to CA000446244A priority patent/CA1208310A/en
Priority to KR1019840000426A priority patent/KR900001740B1/ko
Priority to DE8484300648T priority patent/DE3482343D1/de
Priority to EP84300648A priority patent/EP0116440B1/en
Priority to IE263/84A priority patent/IE55824B1/en
Publication of JPS59142800A publication Critical patent/JPS59142800A/ja
Publication of JPS6236316B2 publication Critical patent/JPS6236316B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/789—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using non-volatile cells or latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP58016273A 1983-02-04 1983-02-04 半導体集積回路装置 Granted JPS59142800A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP58016273A JPS59142800A (ja) 1983-02-04 1983-02-04 半導体集積回路装置
US06/574,728 US4614881A (en) 1983-02-04 1984-01-27 Integrated semiconductor circuit device for generating a switching control signal using a flip-flop circuit including CMOS FET's and flip-flop setting means
CA000446244A CA1208310A (en) 1983-02-04 1984-01-27 Integrated semiconductor circuit device for generating a switching control signal
KR1019840000426A KR900001740B1 (ko) 1983-02-04 1984-01-31 스위칭 제어신호 발생용 반도체 집적회로장치
DE8484300648T DE3482343D1 (de) 1983-02-04 1984-02-02 Integriertes halbleiterschaltungsgeraet zur erzeugung eines umschaltsteuersignals.
EP84300648A EP0116440B1 (en) 1983-02-04 1984-02-02 Integrated semiconductor circuit device for generating a switching control signal
IE263/84A IE55824B1 (en) 1983-02-04 1984-02-03 Integrated semiconductor circuit device for generating a switching control signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58016273A JPS59142800A (ja) 1983-02-04 1983-02-04 半導体集積回路装置

Publications (2)

Publication Number Publication Date
JPS59142800A JPS59142800A (ja) 1984-08-16
JPS6236316B2 true JPS6236316B2 (en:Method) 1987-08-06

Family

ID=11911933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58016273A Granted JPS59142800A (ja) 1983-02-04 1983-02-04 半導体集積回路装置

Country Status (7)

Country Link
US (1) US4614881A (en:Method)
EP (1) EP0116440B1 (en:Method)
JP (1) JPS59142800A (en:Method)
KR (1) KR900001740B1 (en:Method)
CA (1) CA1208310A (en:Method)
DE (1) DE3482343D1 (en:Method)
IE (1) IE55824B1 (en:Method)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2576132B1 (fr) * 1985-01-15 1990-06-29 Eurotechnique Sa Memoire en circuit integre
US4689494A (en) * 1986-09-18 1987-08-25 Advanced Micro Devices, Inc. Redundancy enable/disable circuit
JPH0677400B2 (ja) * 1987-11-12 1994-09-28 シャープ株式会社 半導体集積回路装置
NL8800846A (nl) * 1988-04-05 1989-11-01 Philips Nv Geintegreerde schakeling met een programmeerbare cel.
US5204990A (en) * 1988-09-07 1993-04-20 Texas Instruments Incorporated Memory cell with capacitance for single event upset protection
JPH0289299A (ja) * 1988-09-27 1990-03-29 Nec Corp 半導体記憶装置
US4908525A (en) * 1989-02-03 1990-03-13 The United States Of America As Represented By The Secretary Of The Air Force Cut-only CMOS switch for discretionary connect and disconnect
JPH07105159B2 (ja) * 1989-11-16 1995-11-13 株式会社東芝 半導体記憶装置の冗長回路
US5038368A (en) * 1990-02-02 1991-08-06 David Sarnoff Research Center, Inc. Redundancy control circuit employed with various digital logic systems including shift registers
JP3001252B2 (ja) * 1990-11-16 2000-01-24 株式会社日立製作所 半導体メモリ
JPH0831279B2 (ja) * 1990-12-20 1996-03-27 インターナショナル・ビジネス・マシーンズ・コーポレイション 冗長システム
FR2684206B1 (fr) * 1991-11-25 1994-01-07 Sgs Thomson Microelectronics Sa Circuit de lecture de fusible de redondance pour memoire integree.
US5319592A (en) * 1992-11-25 1994-06-07 Fujitsu Limited Fuse-programming circuit
US5440246A (en) * 1994-03-22 1995-08-08 Mosel Vitelic, Incorporated Programmable circuit with fusible latch
US6100747A (en) * 1994-05-30 2000-08-08 Stmicroelectronics, S.R.L. Device for selecting design options in an integrated circuit
DE69622988D1 (de) * 1996-03-22 2002-09-19 St Microelectronics Srl Schaltung um Übereinstimmung zwischen einer darin gespeicherten binären Informationseinheit und einem einkommenden Datum festzustellen
IT1286037B1 (it) * 1996-10-25 1998-07-07 Sgs Thomson Microelectronics Circuito per la abilitazione selettiva di una pluralita' di alternative circuitali di un circuito integrato
DE69712302T2 (de) 1996-12-31 2002-10-24 Stmicroelectronics, Inc. Struktur und Bauelement zur Auswahl von Entwurfsmöglichkeiten in einem integrierten Schaltkreis
US5889414A (en) * 1997-04-28 1999-03-30 Mosel Vitelic Corporation Programmable circuits
US6084803A (en) * 1998-10-23 2000-07-04 Mosel Vitelic, Inc. Initialization of non-volatile programmable latches in circuits in which an initialization operation is performed
US6163492A (en) 1998-10-23 2000-12-19 Mosel Vitelic, Inc. Programmable latches that include non-volatile programmable elements
US6621319B1 (en) * 1999-09-29 2003-09-16 Agere Systems Inc. Edge-triggered toggle flip-flop circuit
TWI251900B (en) * 2005-02-15 2006-03-21 Neotec Semiconductor Ltd Trimming fuse with latch circuit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228528B2 (en) * 1979-02-09 1992-10-06 Memory with redundant rows and columns
JPS5685934A (en) * 1979-12-14 1981-07-13 Nippon Telegr & Teleph Corp <Ntt> Control signal generating circuit
US4358833A (en) * 1980-09-30 1982-11-09 Intel Corporation Memory redundancy apparatus for single chip memories
US4446534A (en) * 1980-12-08 1984-05-01 National Semiconductor Corporation Programmable fuse circuit
US4546455A (en) * 1981-12-17 1985-10-08 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device
US4459685A (en) * 1982-03-03 1984-07-10 Inmos Corporation Redundancy system for high speed, wide-word semiconductor memories

Also Published As

Publication number Publication date
EP0116440A2 (en) 1984-08-22
US4614881A (en) 1986-09-30
DE3482343D1 (de) 1990-06-28
IE55824B1 (en) 1991-01-30
JPS59142800A (ja) 1984-08-16
KR900001740B1 (ko) 1990-03-19
CA1208310A (en) 1986-07-22
EP0116440B1 (en) 1990-05-23
IE840263L (en) 1984-08-04
KR840008075A (ko) 1984-12-12
EP0116440A3 (en) 1986-05-14

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