JPS6232533A - １０進加減算回路における１０進デ−タ例外検出方式 - Google Patents

１０進加減算回路における１０進デ−タ例外検出方式

Info

Publication number
JPS6232533A
JPS6232533A JP60173050A JP17305085A JPS6232533A JP S6232533 A JPS6232533 A JP S6232533A JP 60173050 A JP60173050 A JP 60173050A JP 17305085 A JP17305085 A JP 17305085A JP S6232533 A JPS6232533 A JP S6232533A
Authority
JP
Japan
Prior art keywords
decimal
data
addition
circuit
input data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60173050A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0377538B2 (enExample
Inventor
Takeshi Yamaguchi
剛 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60173050A priority Critical patent/JPS6232533A/ja
Publication of JPS6232533A publication Critical patent/JPS6232533A/ja
Publication of JPH0377538B2 publication Critical patent/JPH0377538B2/ja
Granted legal-status Critical Current

Links

JP60173050A 1985-08-06 1985-08-06 １０進加減算回路における１０進デ−タ例外検出方式 Granted JPS6232533A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60173050A JPS6232533A (ja) 1985-08-06 1985-08-06 １０進加減算回路における１０進デ−タ例外検出方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60173050A JPS6232533A (ja) 1985-08-06 1985-08-06 １０進加減算回路における１０進デ−タ例外検出方式

Publications (2)

Publication Number Publication Date
JPS6232533A true JPS6232533A (ja) 1987-02-12
JPH0377538B2 JPH0377538B2 (enExample) 1991-12-10

Family

ID=15953284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60173050A Granted JPS6232533A (ja) 1985-08-06 1985-08-06 １０進加減算回路における１０進デ−タ例外検出方式

Country Status (1)

Country Link
JP (1) JPS6232533A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259330A (ja) * 1990-03-08 1991-11-19 Fujitsu Ltd 加算、又は減算のための二入力算術演算方式及び１０進加減算回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03259330A (ja) * 1990-03-08 1991-11-19 Fujitsu Ltd 加算、又は減算のための二入力算術演算方式及び１０進加減算回路

Also Published As

Publication number Publication date
JPH0377538B2 (enExample) 1991-12-10

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