JPS62226232A - 分岐先アドレス算出回路 - Google Patents

分岐先アドレス算出回路

Info

Publication number
JPS62226232A
JPS62226232A JP61068409A JP6840986A JPS62226232A JP S62226232 A JPS62226232 A JP S62226232A JP 61068409 A JP61068409 A JP 61068409A JP 6840986 A JP6840986 A JP 6840986A JP S62226232 A JPS62226232 A JP S62226232A
Authority
JP
Japan
Prior art keywords
instruction
branch
branch instruction
address
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61068409A
Other languages
English (en)
Japanese (ja)
Other versions
JPH056894B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Toshiya Yoshida
俊哉 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP61068409A priority Critical patent/JPS62226232A/ja
Publication of JPS62226232A publication Critical patent/JPS62226232A/ja
Priority to US07/391,665 priority patent/US5088030A/en
Publication of JPH056894B2 publication Critical patent/JPH056894B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
JP61068409A 1986-03-28 1986-03-28 分岐先アドレス算出回路 Granted JPS62226232A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP61068409A JPS62226232A (ja) 1986-03-28 1986-03-28 分岐先アドレス算出回路
US07/391,665 US5088030A (en) 1986-03-28 1989-08-08 Branch address calculating system for branch instructions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61068409A JPS62226232A (ja) 1986-03-28 1986-03-28 分岐先アドレス算出回路

Publications (2)

Publication Number Publication Date
JPS62226232A true JPS62226232A (ja) 1987-10-05
JPH056894B2 JPH056894B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-01-27

Family

ID=13372847

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61068409A Granted JPS62226232A (ja) 1986-03-28 1986-03-28 分岐先アドレス算出回路

Country Status (2)

Country Link
US (1) US5088030A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS62226232A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01214931A (ja) * 1988-02-23 1989-08-29 Mitsubishi Electric Corp データ処理装置

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5522053A (en) * 1988-02-23 1996-05-28 Mitsubishi Denki Kabushiki Kaisha Branch target and next instruction address calculation in a pipeline processor
US5617574A (en) * 1989-05-04 1997-04-01 Texas Instruments Incorporated Devices, systems and methods for conditional instructions
JP2570859B2 (ja) * 1989-05-25 1997-01-16 日本電気株式会社 データ処理装置
US5454089A (en) * 1991-04-17 1995-09-26 Intel Corporation Branch look ahead adder for use in an instruction pipeline sequencer with multiple instruction decoding
US5539888A (en) * 1993-12-23 1996-07-23 Unisys Corporation System and method for processing external conditional branch instructions
US5598546A (en) * 1994-08-31 1997-01-28 Exponential Technology, Inc. Dual-architecture super-scalar pipeline
US5608886A (en) * 1994-08-31 1997-03-04 Exponential Technology, Inc. Block-based branch prediction using a target finder array storing target sub-addresses
US5542109A (en) * 1994-08-31 1996-07-30 Exponential Technology, Inc. Address tracking and branch resolution in a processor with multiple execution pipelines and instruction stream discontinuities
JP3504355B2 (ja) * 1994-12-06 2004-03-08 松下電器産業株式会社 プロセッサ
US6003127A (en) * 1995-10-04 1999-12-14 Nippondenso Co., Ltd. Pipeline processing apparatus for reducing delays in the performance of processing operations
US6279106B1 (en) * 1998-09-21 2001-08-21 Advanced Micro Devices, Inc. Method for reducing branch target storage by calculating direct branch targets on the fly
DE19905510A1 (de) * 1999-02-10 2000-08-31 Siemens Ag Mikroprozessor und Verfahren zur Adressierung in einem Mikroprozessor
US7487334B2 (en) * 2005-02-03 2009-02-03 International Business Machines Corporation Branch encoding before instruction cache write
US20110093658A1 (en) * 2009-10-19 2011-04-21 Zuraski Jr Gerald D Classifying and segregating branch targets

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5039437A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-08-10 1975-04-11
JPS529108A (en) * 1975-07-14 1977-01-24 Matsushita Electric Ind Co Ltd Pump unit for shallow well
JPS5485650A (en) * 1977-12-21 1979-07-07 Hitachi Ltd Branch instruction control system
JPS586972A (ja) * 1981-07-02 1983-01-14 Nec Corp 電子ビ−ム真空蒸着用ハ−スライナ−

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3881173A (en) * 1973-05-14 1975-04-29 Amdahl Corp Condition code determination and data processing
JPS6029126B2 (ja) * 1977-01-14 1985-07-09 株式会社日立製作所 デ−タ処理装置
JPS5621240A (en) * 1979-07-27 1981-02-27 Hitachi Ltd Information processor
CA1174370A (en) * 1980-05-19 1984-09-11 Hidekazu Matsumoto Data processing unit with pipelined operands
US4399507A (en) * 1981-06-30 1983-08-16 Ibm Corporation Instruction address stack in the data memory of an instruction-pipelined processor
US4530050A (en) * 1981-08-26 1985-07-16 Hitachi, Ltd. Central processing unit for executing instructions of variable length having end information for operand specifiers
JPS58189739A (ja) * 1982-04-30 1983-11-05 Hitachi Ltd デ−タ処理システム
US4594655A (en) * 1983-03-14 1986-06-10 International Business Machines Corporation (k)-Instructions-at-a-time pipelined processor for parallel execution of inherently sequential instructions
JPS59174948A (ja) * 1983-03-25 1984-10-03 Toshiba Corp 情報処理装置
US4862346A (en) * 1985-07-02 1989-08-29 Vlsi Technology, Inc. Index for a register file with update of addresses using simultaneously received current, change, test, and reload addresses
US4873630A (en) * 1985-07-31 1989-10-10 Unisys Corporation Scientific processor to support a host processor referencing common memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5039437A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-08-10 1975-04-11
JPS529108A (en) * 1975-07-14 1977-01-24 Matsushita Electric Ind Co Ltd Pump unit for shallow well
JPS5485650A (en) * 1977-12-21 1979-07-07 Hitachi Ltd Branch instruction control system
JPS586972A (ja) * 1981-07-02 1983-01-14 Nec Corp 電子ビ−ム真空蒸着用ハ−スライナ−

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01214931A (ja) * 1988-02-23 1989-08-29 Mitsubishi Electric Corp データ処理装置

Also Published As

Publication number Publication date
US5088030A (en) 1992-02-11
JPH056894B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1993-01-27

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term