JPS62193292A - Mounting of parts on printed wiring board - Google Patents
Mounting of parts on printed wiring boardInfo
- Publication number
- JPS62193292A JPS62193292A JP61035503A JP3550386A JPS62193292A JP S62193292 A JPS62193292 A JP S62193292A JP 61035503 A JP61035503 A JP 61035503A JP 3550386 A JP3550386 A JP 3550386A JP S62193292 A JPS62193292 A JP S62193292A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- mounting
- pins
- parts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 8
- 239000004020 conductor Substances 0.000 description 6
- 239000004575 stone Substances 0.000 description 3
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、ＩＣ等の部品をプリント配線板の表裏へ実
装するための方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for mounting components such as ICs on the front and back sides of a printed wiring board.
第４図は従来からの２５６キロビツトダイナミツクメモ
リ（１）（以下２５［！ＫＤＲＡＭという）の端子ピン
配列を示すもので、第５図〜第７図は２５１１１ＫＤＲ
ＡＭ（１）を実装する場合の例で、（３）はプリント配
線板、（２ａ） 、 （２ｂ）はプリント配線板（３）
の表裏に実装した２５ＥＩＫＤＲＡＭ（１）のパッケー
ジ、（４ａ）、（４ｂ）はＲＡＳピン、（５ａ）、（５
ｂ）はＡ８ピン、（１３ａ） 、 （８ｂ）はＲＡＳピ
ン（４ａ） 、 （４ｂ）を接続する信号線、（７）は
信号ｆｆ１（１３ａ）、（ｅｂ）を接続するためにプリ
ント配線板（３）に形成したスルーホール、（８）はへ
〇ピン（５ａ）、（５ｂ）をプリント配線板（３）に接
続する導体パッドである。Figure 4 shows the terminal pin arrangement of a conventional 256 kilobit dynamic memory (1) (hereinafter referred to as 25 [!KDRAM).
This is an example of mounting AM (1), (3) is a printed wiring board, (2a) and (2b) are printed wiring boards (3)
The package of 25EIK DRAM (1) mounted on the front and back of the
b) is the A8 pin, (13a) and (8b) are the signal lines that connect the RAS pins (4a) and (4b), and (7) is the printed wiring board that connects the signals ff1 (13a) and (eb). The through holes formed in (3) and (8) are conductor pads that connect the pins (5a) and (5b) to the printed wiring board (3).
通常、２５６ＫＤＲＡＭのようなメモリ素子をプリント
配線板に実装する場合、一つの駆動用ＩＣで１０〜２０
石のメモリ素子を駆動することが一般的である。Normally, when a memory element such as 256K DRAM is mounted on a printed wiring board, one drive IC has 10 to 20 memory elements.
It is common to drive stone memory elements.
仮に２０石のメモリ素子を駆動する場合を考えると、配
線長を短くし伝播遅延時間を小さくするためにプリント
配線板の表裏に各々１０石ずつ一列に配置して駆動する
のが一般的である。この場合、プリント配線板（３）の
表に実装された２５６ＫＤＲＡＭと裏に実装された２５
６ＫＤＲＡＭの同一信号端子ピンを信号線（８ａ）、（
ｆｆｂ）とスルーホール（７）で接続する。If we consider the case of driving a 20-stone memory element, it is common to drive it by arranging 10 stones each in a line on the front and back of the printed wiring board in order to shorten the wiring length and reduce the propagation delay time. . In this case, 256K DRAM is mounted on the front side of the printed wiring board (3) and 25K DRAM is mounted on the back side of the printed wiring board (3).
Connect the same signal terminal pin of 6KDRAM to the signal line (8a), (
ffb) and through hole (7).
従来の部品の実装方法は以上のようにされているので、
同一端子ピン配置の２５６ＫＤＲＡＭをプリント配線板
の表裏に実装するため、同一端子ピンがプリント配線板
に面対称にならず、したがってプリント配線板の表裏の
２５８ＫＤＲＡＭの同一信号端子ピンを接続するための
パターンが複雑となり、多層基板を使用する場合が多く
、基板コストが高くなる問題点があった。The conventional component mounting method is as described above.
Since 256K DRAMs with the same terminal pin arrangement are mounted on the front and back sides of the printed wiring board, the same terminal pins are not plane symmetrical on the printed wiring board, so the pattern for connecting the same signal terminal pins of the 258K DRAMs on the front and back sides of the printed wiring board is required. The problem is that the process becomes complicated and a multilayer board is often used, which increases the cost of the board.
この発明は上記のような問題点を解消するためになされ
たもので、実装部品を表裏両面実装する場合のプリント
配線板のパターンを簡単にし、安価な両面実装を実現す
るための実装方法を得ることを目的とする。This invention was made to solve the above-mentioned problems, and provides a mounting method that simplifies the pattern of a printed wiring board when mounting components on both the front and back sides and realizes inexpensive double-sided mounting. The purpose is to
この発明に係る実装方法は、端子ピンの配列が対称性を
有する実装部品をプリント配線板の表裏に面対称に配置
し、各々の対応する同一端子ピンをプリント配線板に形
成したスルーホールにより接続したものである。In the mounting method according to the present invention, mounted components having a symmetrical arrangement of terminal pins are arranged symmetrically on the front and back sides of a printed wiring board, and the corresponding identical terminal pins are connected by through holes formed in the printed wiring board. This is what I did.
この発明における実装方法は、プリント配線板の表裏に
配置した実装部品の同一端子ピンが配線板に面対称に対
応するので、表裏の実装部品の同一端子ピンはプリント
配線板のスルーホールのみで接続可能となり、パターン
が極めて容易となる。In the mounting method of this invention, the same terminal pins of the mounted components arranged on the front and back sides of the printed wiring board correspond to the wiring board plane-symmetrically, so the same terminal pins of the mounted components on the front and back sides are connected only through the through holes of the printed wiring board. This makes the pattern extremely easy.
以下この発明の一実施例を図について説明する。第１図
（ａ）は２５８ＫＤＲＡＭ（１）の端子ピン配列を示し
、第１図（ｂ）は上記２５８ＫＤＲＡＭ（１）の端子ピ
ン配列と対称性を有する別の２５６ＫＤＲＡＭ（ｌａ）
を示す。An embodiment of the present invention will be described below with reference to the drawings. Fig. 1(a) shows the terminal pin arrangement of 258KDRAM (1), and Fig. 1(b) shows another 256KDRAM (la) having symmetry with the terminal pin arrangement of the above 258KDRAM (1).
shows.
第２図および第３図は上記両２５８ＫＤＲＡＭ（１）と
（１ａ）をプリント配線板（３）の表裏に面対称に配置
した平面図と断面図をそれぞれ示す。第３図において、
（４ａ） 、 （４ｂ）はＲＡＳ ピンを示し、 （５
ａ）、（５ｂ）はへ６ピンを示し、それぞれプリント配
線板（３）に面対称に対応している。（８）および（９
）はＲＡＳピン（４ａ）、（４ｂ）およびＡ８ピン（５
ａ）、（５ｂ）をプリント配線板（３）に接続する導体
パターン、（７）はプリント配線板（３）の表裏の導体
パターン（８）、（８）および（９）、（９）をそれぞ
れ接続しているスルーホールである。FIGS. 2 and 3 show a plan view and a sectional view, respectively, of the 258K DRAMs (1) and (1a) arranged symmetrically on the front and back sides of a printed wiring board (3). In Figure 3,
(4a) and (4b) indicate the RAS pin, (5
a) and (5b) show six pins, each of which corresponds to the printed wiring board (3) in plane symmetry. (8) and (9
) are RAS pins (4a), (4b) and A8 pin (5
a), (5b) are the conductor patterns connecting to the printed wiring board (3), (7) is the conductor pattern (8), (8) and (9), (9) on the front and back of the printed wiring board (3). These are through holes that connect each.
上記のようにこの発明による実装方法は、プリント配線
板（３）の表裏に実装した２５６ＫＤＲＡＭ（１） 。As described above, the mounting method according to the present invention includes 256K DRAM (1) mounted on the front and back sides of a printed wiring board (3).
（１ａ）のＲＡＳ ピン（４ａ）、（４ｂ）およびＡ６
ビ７（５ａ）。(1a) RAS pins (4a), (4b) and A6
Bi7 (5a).
（５ｂ）はプリント配線板（３）に面対称に対応するの
で、それぞれの導体パターン（８）、（９）をスルーホ
ール（７）で接続するのみでよく、従来のような信号線
が不要となる。(5b) corresponds plane-symmetrically to the printed wiring board (3), so you only need to connect the respective conductor patterns (8) and (9) with through holes (7), eliminating the need for conventional signal lines. becomes.
なお、実施例では端子ピンとしてＲＡＳピン（４ａ）、
（４ｂ） とＡ６ピ７ （５ａ） 、 （５ｂ）を例ニ
トッテ説明シタが、他の端子ピンの接続についても同様
である。In addition, in the embodiment, the RAS pin (4a),
(4b) and A6 pin 7 (5a) and (5b) are explained as examples, but the same applies to the connections of other terminal pins.
また実装部品として第１図（ａ）、（ｂ）に示すように
端子ピンの配列が完全に対称なものでなく、一部が対称
である場合でもよい。さらに信号線を全くなくしスルー
ホールのみで接続したちの以外、導体パッドに必要に応
じて短い信号線を付けてもよい。Furthermore, as shown in FIGS. 1(a) and 1(b), the mounted component may not have a completely symmetrical arrangement of terminal pins, but may have a partially symmetrical arrangement. Furthermore, short signal lines may be attached to the conductor pads as necessary, instead of eliminating signal lines altogether and connecting only through through holes.
以−１−説明したようにこの発明によれば、端子ピンの
配列が対称性を有する実装部品をプリント配線板の表裏
に面対称に配置し、各々の対応する端子ピンをスルーホ
ールにより接続するようにしたので、従来のような信号
線が不要となりスルーホールのみで接続可能となり、こ
れにより配線板のパターン設計が容易となると共に、信
号層数の少ない安価なプリント配線板を使っての実装が
可能となる。As explained above-1-, according to the present invention, mounted components having a symmetrical arrangement of terminal pins are arranged symmetrically on the front and back sides of a printed wiring board, and the corresponding terminal pins are connected by through holes. This eliminates the need for conventional signal lines and allows connection using only through holes, which simplifies wiring board pattern design and allows for mounting using inexpensive printed wiring boards with a small number of signal layers. becomes possible.
第１図（ａ） 、 （ｂ）はこの発明の一実施例による
端子ピンが対称性の実装部品の平面図、第２図および第
３図は実装部品の実装状態を示す平面図と断面図、：５
４図は従来の実装部品の平面図、第５図〜第７図は実装
状態の平面図と断面図および端子ピン接続の平面図であ
る。
（１） 、 （ｌａ）−・・２５６ＫＤＲＡＭ、（３）
・・・プリント配線板、（４ａ）、（４ｂ） ＝・Ｒ
ＡＳ ピン、（５ａ）、（５ｂ） −＝に６ピン、（７
）・・・スルーホール、
（８）、（９）・・・導体パターン。
なお、各図中、同一符号は同−又は相当部分を示す。FIGS. 1(a) and 3(b) are plan views of a mounted component with symmetrical terminal pins according to an embodiment of the present invention, and FIGS. 2 and 3 are a plan view and a sectional view showing the mounted state of the mounted component. , :5
FIG. 4 is a plan view of a conventional mounted component, and FIGS. 5 to 7 are a plan view and a sectional view of the mounted state, and a plan view of terminal pin connections. (1), (la)--256KDRAM, (3)
...Printed wiring board, (4a), (4b) =・R
AS pin, (5a), (5b) - = 6 pin, (7
)...Through hole, (8), (9)...Conductor pattern. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (1)
ピン等の端子ピンの配列が対称性を有する別の実装部品
とをプリント配線板の表裏に面対称に配置し、上記面対
称に対応する各々の端子ピンをプリント配線板に形成し
たスルーホールにより接続したことを特徴とするプリン
ト配線板への部品の実装方法。A mounted component such as an IC and another mounted component whose terminal pins such as signal pins and power supply pins of this mounted component have a symmetrical arrangement are placed symmetrically on the front and back of a printed wiring board to support the above-mentioned surface symmetry. A method for mounting components on a printed wiring board, characterized in that each terminal pin connected to the printed wiring board is connected through a through hole formed in the printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61035503A JPS62193292A (en) | 1986-02-20 | 1986-02-20 | Mounting of parts on printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61035503A JPS62193292A (en) | 1986-02-20 | 1986-02-20 | Mounting of parts on printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62193292A true JPS62193292A (en) | 1987-08-25 |
Family
ID=12443557
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61035503A Pending JPS62193292A (en) | 1986-02-20 | 1986-02-20 | Mounting of parts on printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62193292A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH032669U (en) * | 1989-05-31 | 1991-01-11 | ||
| JPH06310827A (en) * | 1993-04-26 | 1994-11-04 | Nec Corp | Surface mounting component arrangement structure |
| JP2001174657A (en) * | 1999-12-21 | 2001-06-29 | Toppan Printing Co Ltd | Optical wiring layer, opto-electric wiring board and mounted board |
| JP2009044029A (en) * | 2007-08-10 | 2009-02-26 | Denso Corp | Circuit device mounted with a plurality of microcomputers |
| JP2015115565A (en) * | 2013-12-16 | 2015-06-22 | 住友電装株式会社 | Printed board for mounting microcomputer and controller using the same |
| JP2017165072A (en) * | 2016-03-18 | 2017-09-21 | セイコーエプソン株式会社 | Liquid discharge device and driving circuit |
| JP2017165067A (en) * | 2016-03-18 | 2017-09-21 | セイコーエプソン株式会社 | Liquid discharge device, driving circuit, and integrated circuit |
-
1986
- 1986-02-20 JP JP61035503A patent/JPS62193292A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH032669U (en) * | 1989-05-31 | 1991-01-11 | ||
| JPH06310827A (en) * | 1993-04-26 | 1994-11-04 | Nec Corp | Surface mounting component arrangement structure |
| JP2001174657A (en) * | 1999-12-21 | 2001-06-29 | Toppan Printing Co Ltd | Optical wiring layer, opto-electric wiring board and mounted board |
| JP2009044029A (en) * | 2007-08-10 | 2009-02-26 | Denso Corp | Circuit device mounted with a plurality of microcomputers |
| JP2015115565A (en) * | 2013-12-16 | 2015-06-22 | 住友電装株式会社 | Printed board for mounting microcomputer and controller using the same |
| JP2017165072A (en) * | 2016-03-18 | 2017-09-21 | セイコーエプソン株式会社 | Liquid discharge device and driving circuit |
| JP2017165067A (en) * | 2016-03-18 | 2017-09-21 | セイコーエプソン株式会社 | Liquid discharge device, driving circuit, and integrated circuit |
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