JPS61253894A - Multilayer printed wiring board - Google Patents
Multilayer printed wiring boardInfo
- Publication number
- JPS61253894A JPS61253894A JP9491285A JP9491285A JPS61253894A JP S61253894 A JPS61253894 A JP S61253894A JP 9491285 A JP9491285 A JP 9491285A JP 9491285 A JP9491285 A JP 9491285A JP S61253894 A JPS61253894 A JP S61253894A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- printed wiring
- wiring board
- multilayer printed
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、多層プリント配線板、特に電子部品を実装し
、かつ、電子部品相互の配線接続を行なうだめの多層プ
リント配線基板に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multilayer printed wiring board, and particularly to a multilayer printed wiring board on which electronic components are mounted and wiring connections are made between the electronic components.
従来の多層プリント配線板において、信号配線層には２
層単位で２層間のみを接続するピアホールというホール
が設けられるが、電源供給層にはこのホールが設けられ
ていない。In conventional multilayer printed wiring boards, the signal wiring layer has two layers.
A hole called a peer hole is provided for connecting only two layers in each layer, but this hole is not provided in the power supply layer.
このように、上述した従来の多層プリント配線板の電源
供給層にはピアホール（ｖｉａ−ｈｏｌｅ ）が設けら
れていないため、多種の電源供給を行なう場合、電源供
給層の数が不足する、あるいは電源を分割したとしても
効率のよい電源供給ができないという欠点がある。As described above, the power supply layer of the conventional multilayer printed wiring board described above is not provided with a via-hole, so when supplying various kinds of power, the number of power supply layers is insufficient or the power supply layer is Even if it is divided, it has the disadvantage that it is not possible to provide an efficient power supply.
本発明の多層プリント配線板は少なくとも２層以上の電
源供給層を含み、かつ、その中の２つの電源供給層が隣
接する構成となっておシ、この２つの電源供給層間のみ
を接続するピアホール（ｖｉａ−ｈｏｌｅ ）を有して
構成される。The multilayer printed wiring board of the present invention includes at least two power supply layers, two of which are adjacent to each other, and a peer hole that connects only between the two power supply layers. (via-hole).
次に、本発明の実施例について、図面を参照して説明す
る。Next, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例を示す透視図で、多層プリン
ト配線板の電源供給層２層およびこの層間にある絶縁層
の透視図である。FIG. 1 is a perspective view showing one embodiment of the present invention, and is a perspective view of two power supply layers of a multilayer printed wiring board and an insulating layer between these layers.
電源供給パターン２，３．４は同一層内にあシ、電源供
給パターン５．６はもう一つの層にある。The power supply patterns 2, 3.4 are in the same layer, and the power supply pattern 5.6 is in another layer.
ピアホール（ｖｉａ−ｈｏｌｅ ） ７はこの両層の層
間にある絶縁層にあシ、両層のパターンの接続を行なう
。A via-hole 7 is provided in the insulating layer between these two layers, and connects the patterns of both layers.
第１図に示す多層プリント配線板において、電源供給パ
ターン２，４は同種の電源で、電源供給パターン３はこ
れらとは別の種類である場合に電源供給パターン２，４
を接続する必要が生じた場合、第１図に示す多層プリン
ト配線板においては、電源供給パターン５の一部を切シ
離し、電源供給パターン２，４の接続用の電源供給パタ
ーン６を作シ、この電源供給パターン６と電源供給パタ
ーン２，４それぞれに接続するためのピアホール７を設
けることによシ、電源供給パターン２，４の接続を簡単
に実行することができる。従来の多層プリント配線板で
はＧＮＤパターンで１層分を使用し、他の１層で各種電
源パターンを配線することが多いため、電子部品の配置
によっては電源供給パターンの配線が困難な部分を生じ
ることもある。特に電源の種類が多い場合には、上述の
よう々問題がおこシやすかった。In the multilayer printed wiring board shown in FIG.
When it becomes necessary to connect the power supply patterns 2 and 4, in the multilayer printed wiring board shown in FIG. By providing peer holes 7 for connecting the power supply pattern 6 and the power supply patterns 2 and 4, respectively, the power supply patterns 2 and 4 can be easily connected. Conventional multilayer printed wiring boards often use one layer for the GND pattern and wire various power supply patterns on the other layer, so depending on the placement of electronic components, it may be difficult to route the power supply patterns. Sometimes. Particularly when there are many types of power sources, the above-mentioned problems are likely to occur.
また、従来のプリント配線板でも、第１図に示すピアホ
ール７の代わシにスルーホールを使用すれば同一のよう
なことが可能となるが、部品搭載部分のスルーホールお
よび配線で使用しているスルーホール以外のスルーホー
ルを用いなければならないため、場所、数共に非常に制
限を受け、自由に設けることができない。また、このス
ルーホールを設けることによって配線収容性が悪くなる
ことも考えられる。In addition, even with conventional printed wiring boards, the same thing can be done by using a through hole instead of the peer hole 7 shown in Figure 1, but it is possible to do the same thing by using a through hole in the component mounting area and for wiring. Since through-holes other than through-holes must be used, the location and number of holes are extremely limited, and they cannot be freely provided. Further, it is also conceivable that the provision of this through hole may deteriorate the wiring accommodation.
第１図に示す実施例では単純な例を示したが、同様な考
え方でかなり複雑な電源ピン配置および電子部品配置に
対しても電源供給を行なうことができるし、電源の配線
パターンにおいて従来、電源供給源から電子部品の電源
ピンまでの距離が長（、ＡＣ的、ＤＣ的に問題のあった
ものを、本発明により短かくシ、電気的特性を改善する
ことも可能である。Although the embodiment shown in FIG. 1 shows a simple example, the same concept can be used to supply power even to quite complicated power pin arrangement and electronic component arrangement. The present invention makes it possible to shorten the distance from the power supply source to the power supply pin of an electronic component (which caused AC and DC problems) and improve the electrical characteristics.
本発明の多層プリント配線板は、電源層間にピアホール
（ｖｉａ−ｈｏｌｅ ）を設けることによりて、電子部
品の電源ピンがどう配置されていてもまた電子部品が、
どこに配置されていても、電気的特性を悪化させること
なく、かつ、パターンの収容性を悪くすることなく、プ
リント配線板上のすべての電子部品に対し電源を供給で
きるという効果がある。The multilayer printed wiring board of the present invention provides via-holes between power supply layers, so that no matter how the power supply pins of the electronic components are arranged, the electronic components can
No matter where they are placed, there is an effect that power can be supplied to all electronic components on the printed wiring board without deteriorating electrical characteristics or deteriorating pattern accommodation.
第１図は本発明の一実施例を示す透視図である。
１・・・・・・プリント配線板、２〜６・・・・・・電
源供給パターン、７・・・・・・ピアホール。FIG. 1 is a perspective view showing an embodiment of the present invention. 1...Printed wiring board, 2-6...Power supply pattern, 7...Pier hole.
Claims (1)
つの電源供給層が隣接する構成となっている多層プリン
ト配線板において、２つの電源供給層間のみを接続する
ためのホールを含むことを特徴とする多層プリント配線
板。Contains at least two or more power supply layers, and the second
1. A multilayer printed wiring board having a structure in which two power supply layers are adjacent to each other, the multilayer printed wiring board comprising a hole for connecting only two power supply layers.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9491285A JPS61253894A (en) | 1985-05-02 | 1985-05-02 | Multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9491285A JPS61253894A (en) | 1985-05-02 | 1985-05-02 | Multilayer printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61253894A true JPS61253894A (en) | 1986-11-11 |
Family
ID=14123219
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9491285A Pending JPS61253894A (en) | 1985-05-02 | 1985-05-02 | Multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61253894A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63132478U (en) * | 1987-02-20 | 1988-08-30 |
-
1985
- 1985-05-02 JP JP9491285A patent/JPS61253894A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63132478U (en) * | 1987-02-20 | 1988-08-30 |
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