JPS62274695A - Multilayer interconnection board - Google Patents
Multilayer interconnection boardInfo
- Publication number
- JPS62274695A JPS62274695A JP11799286A JP11799286A JPS62274695A JP S62274695 A JPS62274695 A JP S62274695A JP 11799286 A JP11799286 A JP 11799286A JP 11799286 A JP11799286 A JP 11799286A JP S62274695 A JPS62274695 A JP S62274695A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- multilayer wiring
- multilayer interconnection
- interconnection board
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 5
- 238000004806 packaging method and process Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
3、発明の詳細な説明
〔産業上の利用分野]
本発明は多層配線基板に関し、特にその配線構造に関す
るものである。Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a multilayer wiring board, and particularly to its wiring structure.
[従来の技術]
従来、この種の多層配線基板は、コンピュータの大型化
、高速化、大容量化に伴ない電子部品の実装面の高密度
化が要求されている。[Prior Art] Conventionally, this type of multilayer wiring board has been required to have a higher density mounting surface for electronic components as computers become larger, faster, and have larger capacities.
第2図は従来技術による多層配線基板の構造を示す斜視
図である。FIG. 2 is a perspective view showing the structure of a multilayer wiring board according to the prior art.
図中4が多層配線基板で、この多層配線基板4の表面上
に実装された部品5と共に外部回路や外部装置との接続
を行うための接続用パッド(以下、IOパッドと略す)
6が、部品5の周囲を囲むようにして多数配設しである
。In the figure, reference numeral 4 denotes a multilayer wiring board, and together with components 5 mounted on the surface of this multilayer wiring board 4, connection pads (hereinafter abbreviated as IO pads) are used to connect with external circuits and external devices.
6 are arranged in large numbers so as to surround the periphery of the component 5.
[解決すべき問題点]
上述した従来の多層配線基板4は、外部回路との接続を
行なうIOパッド6を多層配線基板4の一つの表面上に
部品5と共に設ける構造となっているため、多層配線基
板4の表面とにIOパッド6用の専用領域が必要であり
、この領域の存在が多層配線基板4に於ける部品5の実
装密度低下の要因となっていた。[Problems to be Solved] The conventional multilayer wiring board 4 described above has a structure in which the IO pad 6 for connection with an external circuit is provided together with the component 5 on one surface of the multilayer wiring board 4. A dedicated area for the IO pad 6 is required on the surface of the wiring board 4, and the existence of this area has been a factor in reducing the packaging density of the components 5 on the multilayer wiring board 4.
特に、電子部品を多く必要とする大型コンピュータ、ス
ーパーコンピュータの分野に於いては、他と比べて多層
配線基板に於ける高密度実装が一層要求されるため、上
記実装密度低下の要因は重大な問題となっていた。In particular, in the field of large computers and supercomputers that require many electronic components, high-density packaging on multilayer wiring boards is required more than in other fields, so the above-mentioned factors for lower packaging density are important. It was a problem.
[問題点の解決手段]
上記従来の問題点を解決する本発明の多層配線基板は、
絶縁基板上に導体配線パターンを形成する多層配線基板
において、外部装置や外部回路等への接続を行なう為の
接続用パッドを、前記多層配線基板の側面に設ける構成
となっている。[Means for solving the problems] The multilayer wiring board of the present invention that solves the above-mentioned conventional problems has the following features:
In a multilayer wiring board in which a conductor wiring pattern is formed on an insulating substrate, connection pads for connecting to external devices, external circuits, etc. are provided on the side surface of the multilayer wiring board.
[実施例]
次に1本発明の実施例について図面を参照して説明する
。第1図は本発明の一実施例を示す斜視図である。なお
、以下では各構成要素自体は従来例と同様であるので共
通の符号を以って示す。[Example] Next, an example of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing an embodiment of the present invention. In addition, since each component itself is the same as that of the conventional example, it is indicated by the common code|symbol below.
図示のように絶縁基板上に導体配線パターンを形成して
なる多層配線基板lの上面には、面上一杯に高密度で部
品2が設けられており、いわゆる高密度実装を可能にし
ている。As shown in the figure, on the upper surface of a multilayer wiring board l formed by forming conductor wiring patterns on an insulating substrate, components 2 are provided at high density all over the surface, making so-called high-density mounting possible.
また多層配線基板lの側面には、外部回路との接続を行
なうためのIOパッド3が、これも高密度に形成しであ
る。この■0パッド3は薄nり印刷法又は厚膜印刷法を
用いて形成するものである。Further, on the side surface of the multilayer wiring board 1, IO pads 3 for connection with external circuits are also formed at high density. This (1)0 pad 3 is formed using a thin film printing method or a thick film printing method.
なお、このIOパッド3は、多層配線基板lの側面を貫
通する形で多層配線基板lの内部回路と接続できる構成
としである。Note that this IO pad 3 is configured so that it can be connected to the internal circuit of the multilayer wiring board l by penetrating the side surface of the multilayer wiring board l.
図示の例では、工0パッド3を多層配線基板lの図示さ
れている二つの全体に設けるようにしであるが、勿論多
層配線基板lの一辺のみまたは全通に設けても良い。In the illustrated example, the pads 3 are provided on the entire two sides of the multilayer wiring board 1 shown, but of course they may be provided on only one side of the multilayer wiring board 1 or on the entire length of the multilayer wiring board 1.
[発明の効果]
以上説明したように本発明に係る多層配線基板は、外部
回路との接続を行なう為の接続用パッドを部品とは異な
る側面上に設けるようにしたため、従来部品の周囲に同
−表面内で必要となっていた接続用パッドのための専用
の領域が不要となり、−面全体を部品実装用として使用
出来るため、実装可能領域が拡大し、実装密度の向上を
図る事が出来るという効果がある。[Effects of the Invention] As explained above, the multilayer wiring board according to the present invention has connection pads for connecting with an external circuit on a side surface different from that of the components. -A dedicated area for connection pads that was previously required within the surface is no longer required, and the entire -surface can be used for component mounting, expanding the mounting area and improving mounting density. There is an effect.
第1図は本発明の一実施例に係る多層配線基板を示す斜
視図、
第2図は従来の多層配線基板を示す斜視図である。
l:多層配m基板
2二部品
3:接続用パッドFIG. 1 is a perspective view showing a multilayer wiring board according to an embodiment of the present invention, and FIG. 2 is a perspective view showing a conventional multilayer wiring board. l: Multilayer board 2 2 parts 3: Connection pad
Claims (1)
板において、 前記絶縁基板の側面上に、外部装置や外部回路等への接
続用パッドを設けたことを特徴とする多層配線基板。[Scope of Claims] A multilayer wiring board in which a conductive wiring pattern is formed on an insulating substrate, characterized in that a pad for connection to an external device, an external circuit, etc. is provided on a side surface of the insulating substrate. substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11799286A JPS62274695A (en) | 1986-05-22 | 1986-05-22 | Multilayer interconnection board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11799286A JPS62274695A (en) | 1986-05-22 | 1986-05-22 | Multilayer interconnection board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62274695A true JPS62274695A (en) | 1987-11-28 |
Family
ID=14725348
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11799286A Pending JPS62274695A (en) | 1986-05-22 | 1986-05-22 | Multilayer interconnection board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62274695A (en) |
-
1986
- 1986-05-22 JP JP11799286A patent/JPS62274695A/en active Pending
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