JPS62208691A - Double-sided mounting hybrid integrated circuit - Google Patents

Double-sided mounting hybrid integrated circuit

Info

Publication number
JPS62208691A
JPS62208691A JP5047186A JP5047186A JPS62208691A JP S62208691 A JPS62208691 A JP S62208691A JP 5047186 A JP5047186 A JP 5047186A JP 5047186 A JP5047186 A JP 5047186A JP S62208691 A JPS62208691 A JP S62208691A
Authority
JP
Japan
Prior art keywords
double
integrated circuit
hybrid integrated
pin
sided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5047186A
Other languages
Japanese (ja)
Inventor
小関 護
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5047186A priority Critical patent/JPS62208691A/en
Publication of JPS62208691A publication Critical patent/JPS62208691A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は混成集積回路に係り、とくに高密度化に好適な
両面回路パターンの接続を可能にした両面実装型混成集
積回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a hybrid integrated circuit, and more particularly to a double-sided mounting type hybrid integrated circuit that enables connection of double-sided circuit patterns suitable for high density.

[従来の技術] 従来の両面実装型混成集積回路においては,両面パター
ンを接続する場合には、たとえば特開昭60 − 11
01.90号に記載されている如く、セラミック基板上
にスクリーン印刷法により所定の導体回路。
[Prior art] In conventional double-sided mounting type hybrid integrated circuits, when connecting double-sided patterns, for example, Japanese Patent Laid-Open No. 60-11
Predetermined conductor circuits by screen printing on a ceramic substrate as described in No. 01.90.

抵抗回路などを形成し,該基板上に所定部品を搭載した
混成集積回路素子と、可撓性をもつ両面銅張積層板に所
定の導体回路およびスルーホールを形成したフレキシブ
ルプリント基板とを設け、前記混成集積回路素子の表面
とその反対側の面に前記フレキシブルプリント基板の端
縁を張り合せ、このフレキシブルプリン1一基板の端縁
を前記混成集積回路の表面側に折返してフレキシブルプ
リント基板と混成集積回路素子とが一体構造になるよう
にフレキシブルプリント基板の外部接続用導体部と混成
集積回路素子の外部接続部導体とを重ね合せて電気的に
接続するものが提案されている。
A hybrid integrated circuit element having a resistance circuit formed thereon and predetermined components mounted on the substrate, and a flexible printed circuit board having a predetermined conductor circuit and through holes formed on a flexible double-sided copper-clad laminate, The edges of the flexible printed circuit board are bonded to the surface of the hybrid integrated circuit element and the surface opposite thereto, and the edges of the flexible printed circuit board are folded back to the surface side of the hybrid integrated circuit to be combined with the flexible printed circuit board. It has been proposed that the external connection conductor part of the flexible printed circuit board and the external connection part conductor of the hybrid integrated circuit element are overlapped and electrically connected so that the integrated circuit element and the integrated circuit element form an integral structure.

また特開昭60−77489号に記載されている如く、
2分割された電子回路に対応してそれぞれ片面にのみ回
路パターンが形成された2個のセラミック基板を設け、
これら両基板を挿入ピンなどの接続部材により接着する
とともに電気的に接続するものが提案されている。
Also, as described in Japanese Patent Application Laid-Open No. 60-77489,
Two ceramic substrates each having a circuit pattern formed only on one side are provided corresponding to the two divided electronic circuits.
It has been proposed that these two substrates are bonded and electrically connected using a connecting member such as an insertion pin.

さらに特開昭60−31291号に記載されている如く
、絶縁性基板の両面にICチップ、積層セラミックコン
デンサなどの回路部品を搭載し、前記基板の一辺からの
み外部引出し端子を取り出し、端子付近に対向する辺を
凹凸の形状にしてこの凹凸の両面に表裏接続用の電極バ
ットを配置し、この電極バットの配置された基板凸部を
導電性樹脂溜めに浸漬することにより前記表裏電極バッ
ト間の電気的接続を行なうものが提案されている。
Furthermore, as described in Japanese Patent Application Laid-open No. 60-31291, circuit components such as IC chips and multilayer ceramic capacitors are mounted on both sides of an insulating substrate, and external lead-out terminals are taken out from only one side of the substrate and placed near the terminals. Opposing sides are made into an uneven shape, and electrode bats for connecting the front and back sides are arranged on both sides of the unevenness, and the convex part of the substrate on which the electrode bats are arranged is immersed in a conductive resin reservoir, thereby forming a gap between the front and back electrode bats. Proposals have been made to make electrical connections.

これら従来例は接続点の個数があまり多くない場合に使
用されている。
These conventional examples are used when the number of connection points is not very large.

[発明が解決しようとする問題点コ 前記従来の技術は、接続点1個あたりの所要面積を小さ
くすることについて配慮されていないため、接続点1個
あたりの所要面積が大きくなる問題があった。
[Problems to be Solved by the Invention] The above-mentioned conventional technology did not give consideration to reducing the area required for each connection point, so there was a problem that the area required for each connection point became large. .

すなわち、前記従来の技術においては、前記スルーホー
ル、挿入ピン、導電性フレームおよび外部引出し端子1
個当りの接続点が1個であるため、各接続点の所要面積
が3〜5m程度必要になって全体の面積が大きくなると
ともに高密度化をはかることが困雅であった。
That is, in the conventional technology, the through hole, the insertion pin, the conductive frame and the external lead terminal 1
Since each connection point is one, each connection point requires an area of about 3 to 5 m, which increases the overall area and makes it difficult to achieve high density.

本発明の目的は、前記従来技術の問題点を解決し、接続
点1個当りの所要面積を減少して全体の面積を小形化し
、かつ高密度化を可能とする両面実装型混成集積回路を
提供することにある。
An object of the present invention is to solve the problems of the prior art as described above, and to provide a double-sided mounting type hybrid integrated circuit which can reduce the area required per connection point, downsize the overall area, and enable higher density. It is about providing.

[問題点を解決するための手段] 前記の目的は、両面に回路パターンを有する絶縁基板の
両面を接続する貫通穴を設け、この貫通穴に嵌挿し、周
面に前記回路パターンと接続する配線パターンを有する
接続部材を設けることにより達成される。
[Means for Solving the Problems] The above object is to provide a through hole connecting both sides of an insulating substrate having circuit patterns on both sides, and to insert wiring into the through hole and connecting to the circuit pattern on the peripheral surface. This is achieved by providing a connecting member with a pattern.

[作用ゴ 前記の如く構成することにより、複数個の接続点を一括
して接続可能になるので、接続点1個当りの面積が小さ
くなって全体の面積が小形になりかつ高密度化をはかる
ことができる。
[Operations] By configuring as described above, it becomes possible to connect multiple connection points at once, so the area per connection point becomes smaller, resulting in a smaller overall area and higher density. be able to.

[実施例] 以下、本発明の実施例を示す第1図乃至第5図について
説明する。第1図は本発明による両面実装型混成集積回
路の要旨を示す斜視図、第2図は第1図の縦断面図、第
3図乃至第5図は第1図および第2図に示すピンの斜視
図である。
[Example] Hereinafter, FIGS. 1 to 5 showing examples of the present invention will be described. FIG. 1 is a perspective view showing the gist of the double-sided mount type hybrid integrated circuit according to the present invention, FIG. 2 is a vertical sectional view of FIG. 1, and FIGS. 3 to 5 are pins shown in FIGS. 1 and 2. FIG.

第1図および第2図において、1は絶縁基板にして、そ
の表裏両面を接続する貫通穴4と、この貫通穴4に接続
する如く該絶縁基板1の表裏両面に夫々放射状に複数個
の回路パターン2,3を形成している。5は円柱状の絶
縁体にて形成された接続部材にしてたとえば第3図乃至
第5図に示す如く構成されている。すなわち、第3図に
示す如く、表面に前記表側回路パターン2と裏側回路パ
ターン3とを接続するための複数個の配線パターン7を
並列に形成した薄板状の絶縁体からなるフレキシブルプ
リント基板6をピン5aの外周面に巻き付けるか、ある
いは第4図に示す如く、円柱状のセラミックにて形成さ
れたピン5bの外周面に夫々導体ペーストを印刷焼成し
て複数個の配線パターン8を形成するか、もしくは第5
図に示す如く、円柱状の樹脂にて形成されたピン5cの
外周面に夫々導体線材を埋め込んで複数個の配線パター
ン9を形成したものから構成されている。10はハンダ
にして、前記ピン5a、5b、5cの外周面の複数個の
配線パターン7.8.9と、前記複数個の表側回路パタ
ーン2および複数個の裏側回路パターン3との間に電気
的に接続する如く付している。
1 and 2, reference numeral 1 denotes an insulating substrate, with a through hole 4 connecting both the front and back surfaces of the insulating substrate 1, and a plurality of circuits radially extending on both the front and back surfaces of the insulating substrate 1 so as to be connected to the through hole 4. Patterns 2 and 3 are formed. Reference numeral 5 denotes a connecting member made of a cylindrical insulator, and is constructed as shown in FIGS. 3 to 5, for example. That is, as shown in FIG. 3, a flexible printed circuit board 6 made of a thin plate-like insulator has a plurality of wiring patterns 7 formed in parallel on its surface for connecting the front side circuit pattern 2 and the back side circuit pattern 3. A plurality of wiring patterns 8 may be formed by wrapping the conductive paste around the outer circumferential surface of the pin 5a, or by printing and baking a conductive paste on the outer circumferential surface of the pin 5b, which is made of cylindrical ceramic, as shown in FIG. , or the fifth
As shown in the figure, a plurality of wiring patterns 9 are formed by embedding conductor wires in the outer peripheral surface of a pin 5c made of cylindrical resin. Reference numeral 10 uses solder to connect electrically between the plurality of wiring patterns 7.8.9 on the outer circumferential surface of the pins 5a, 5b, 5c and the plurality of front side circuit patterns 2 and the plurality of back side circuit patterns 3. It is attached so that it can be connected.

本発明による両面実装型混成集積回路は前記の如く構成
されているから、今前記接続部材5に前記第3図に示す
如くフレキシブルプリント基板6を使用した場合につい
て述べると、前記貫通穴4の半径を1.5mとし、フレ
キシブルプリント基板6の配線パターン7のピッチを0
.5+nm と“した場合、フレキシブルプリント基板
6に形成される配線パターン7の数すなわち配線パター
ン7と、表側回路パターン2および裏側回路パターン3
との接続点数は 2X1.5xπ÷0.5=18 となる。また前記接続点1個当りの所要面積は、はんだ
付用バットの大きさ1.Xo、3mm”およびこのはん
だ付用バットを絶縁基板1の両面に設置するのを考慮す
ると、 (1,5” X 7C/ 18+0.3)  X 2 
=1..4mn2になる。
Since the double-sided mount type hybrid integrated circuit according to the present invention is constructed as described above, the case where a flexible printed circuit board 6 as shown in FIG. 3 is used as the connection member 5 will now be described. is 1.5m, and the pitch of the wiring pattern 7 of the flexible printed circuit board 6 is 0.
.. 5+nm, the number of wiring patterns 7 formed on the flexible printed circuit board 6, that is, the wiring patterns 7, the front side circuit pattern 2 and the back side circuit pattern 3.
The number of connection points with is 2×1.5×π÷0.5=18. Also, the required area for each connection point is 1. Considering that Xo, 3mm” and this soldering bat will be installed on both sides of the insulating board 1, (1,5” X 7C/ 18+0.3) X 2
=1. .. It becomes 4mn2.

これに対して従来のスルーホール印刷法における接続点
1個当りの所要面積は、今絶縁基板1の両面上の回路パ
ターンの半径を0.75nwnとすると、(0,752
X 7C) X 2 =3.5+nm2になり、本発明
における接続点1個当りの所要面積が従来のものと比較
して低減できる。
On the other hand, the required area per connection point in the conventional through-hole printing method is (0,752
X 7C)

「発明の効果コ 以」二述べたる如く、本発明によれば、接続点1個当り
の所要面積が従来に比較して小さくなるので、全体の形
状が小形になり、かつ高密度化をはかることができる。
As described in "Effects of the Invention" 2, according to the present invention, the area required for each connection point is smaller than that of the conventional method, so the overall shape is smaller and higher density is achieved. be able to.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明による両面実装型混成集積回路の要部を
示す斜視図、第2図は第1図の縦断面図、第3図乃至第
5図は第1図および第2図に示すピンの斜視図である。 1・・・絶縁基板、2,3・・・回路パターン、4・・
・貫通穴、5・・・接続部材、5a、5b、5c・・・
ピン、6・・・フレキシブルプリント基板、7,8.9
・・・配線パターン、10・・・ハンダ。
FIG. 1 is a perspective view showing the main parts of a double-sided mount type hybrid integrated circuit according to the present invention, FIG. 2 is a vertical sectional view of FIG. 1, and FIGS. 3 to 5 are shown in FIGS. 1 and 2. It is a perspective view of a pin. 1... Insulating board, 2, 3... Circuit pattern, 4...
・Through hole, 5... Connection member, 5a, 5b, 5c...
Pin, 6...Flexible printed circuit board, 7, 8.9
...Wiring pattern, 10...Solder.

Claims (1)

【特許請求の範囲】 1、両面に回路パターンを有する絶縁基板の両面を接続
する貫通穴を設け、この貫通穴に嵌挿し、周面に前記回
路パターンと接続する配線パターンを有する接続部材を
設けたことを特徴とする両面実装型混成集積回路。 2、前記接続部材は絶縁体からなるピンと、このピンの
周面に巻付かれ、表面に配線パターンを有するフレキシ
ブルプリント基板とから構成されていることを特徴とす
る特許請求の範囲第1項記載の両面実装型混成集積回路
。 3、前記接続部材はセラミックにて形成されたピンと、
このピンの周面に導体ペーストを印刷焼成して形成され
た配線パターンとから構成されていることを特徴とする
前記特許請求の範囲第1項記載の両面実装型混成集積回
路。 4、前記接続部材は樹脂にて形成されたピンと、このピ
ンの周面に導体線材を埋込んで形成された配線パターン
とから構成されていることを特徴とする前記特許請求の
範囲第1項記載の両面実装型混成集積回路。
[Claims] 1. A through hole is provided to connect both sides of an insulating substrate having circuit patterns on both sides, and a connecting member is provided on the circumferential surface of the insulating substrate to be fitted into the through hole and has a wiring pattern connected to the circuit pattern. A double-sided mounting type hybrid integrated circuit. 2. The connecting member is comprised of a pin made of an insulator and a flexible printed circuit board that is wrapped around the circumferential surface of the pin and has a wiring pattern on its surface. double-sided mounted hybrid integrated circuit. 3. The connecting member includes a pin made of ceramic;
The double-sided mounting type hybrid integrated circuit according to claim 1, further comprising a wiring pattern formed by printing and baking a conductive paste on the circumferential surface of the pin. 4. The connection member is comprised of a pin made of resin and a wiring pattern formed by embedding a conductor wire in the circumferential surface of the pin. Double-sided mounted hybrid integrated circuit as described.
JP5047186A 1986-03-10 1986-03-10 Double-sided mounting hybrid integrated circuit Pending JPS62208691A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5047186A JPS62208691A (en) 1986-03-10 1986-03-10 Double-sided mounting hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5047186A JPS62208691A (en) 1986-03-10 1986-03-10 Double-sided mounting hybrid integrated circuit

Publications (1)

Publication Number Publication Date
JPS62208691A true JPS62208691A (en) 1987-09-12

Family

ID=12859807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5047186A Pending JPS62208691A (en) 1986-03-10 1986-03-10 Double-sided mounting hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPS62208691A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6437076U (en) * 1987-08-31 1989-03-06
WO2009066391A1 (en) * 2007-11-22 2009-05-28 Fujitsu Limited Printed board and its manfuacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6437076U (en) * 1987-08-31 1989-03-06
WO2009066391A1 (en) * 2007-11-22 2009-05-28 Fujitsu Limited Printed board and its manfuacturing method

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