JPS5914394U - hybrid integrated circuit board - Google Patents
hybrid integrated circuit boardInfo
- Publication number
- JPS5914394U JPS5914394U JP10831082U JP10831082U JPS5914394U JP S5914394 U JPS5914394 U JP S5914394U JP 10831082 U JP10831082 U JP 10831082U JP 10831082 U JP10831082 U JP 10831082U JP S5914394 U JPS5914394 U JP S5914394U
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- integrated circuit
- hybrid integrated
- external
- ceramic substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Combinations Of Printed Boards (AREA)
- Mounting Of Printed Circuit Boards And The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図ａ、 ｂ、 ｃ、 ｄ、 ｅは従来の混
成集積回路基板を示す側面図、平面図、断面図、第２図
ａ。
ｂ、 ｃ、 ｄは本考案の一実施例における混成集
積回路基板の側面図、斜視図、平面図、断面図である。
１・・・・・・セラミック回路基板、′２・・・・・・
接続用端子ピン、３・・・・・・リード端子付外付部品
、４・・・・・・半田、５・・・・・・外部回路基板、
６・・・・・・リードレス形外付部品、７・・・・・・
抵抗体、８・・・・・・端子ピン、９・・・・・・有機
絶縁材からなる基板。Figures 1a, b, c, d, and e are a side view, top view, and cross-sectional view of a conventional hybrid integrated circuit board, and Figure 2a is a side view, a top view, and a cross-sectional view. b, c, and d are a side view, a perspective view, a plan view, and a sectional view of a hybrid integrated circuit board according to an embodiment of the present invention. 1...Ceramic circuit board, '2...
Connection terminal pin, 3...External component with lead terminal, 4...Solder, 5...External circuit board,
6...Leadless external parts, 7...
Resistor, 8...Terminal pin, 9...Substrate made of organic insulating material.
Claims (1)
の回路素子を設け、その印刷導体に外付部品を装着しか
つ外部回路接続用の端子ピンを設け、有機絶縁基板に導
体とリード端子付外付部品挿入用の孔を設け、上記挿入
孔に外付部品を装着し、上記セラミック基板を接続用の
端子を介して電気的に接続した混成集積回路基板。
′Circuit elements such as printed conductors and resistors are provided on at least one surface of the ceramic substrate, external components are attached to the printed conductor, and terminal pins are provided for connecting external circuits, and external components with conductors and lead terminals are provided on the organic insulating substrate. A hybrid integrated circuit board having a hole for inserting a component, mounting an external component in the insertion hole, and electrically connecting the ceramic substrate through a connection terminal.
′
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10831082U JPS5914394U (en) | 1982-07-16 | 1982-07-16 | hybrid integrated circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10831082U JPS5914394U (en) | 1982-07-16 | 1982-07-16 | hybrid integrated circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5914394U true JPS5914394U (en) | 1984-01-28 |
Family
ID=30252744
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10831082U Pending JPS5914394U (en) | 1982-07-16 | 1982-07-16 | hybrid integrated circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5914394U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6159589U (en) * | 1984-09-21 | 1986-04-22 | ||
| JPH0356513U (en) * | 1989-10-04 | 1991-05-30 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4817742U (en) * | 1971-07-07 | 1973-02-28 | ||
| JPS536550B2 (en) * | 1974-03-22 | 1978-03-09 | ||
| JPS5546561A (en) * | 1978-09-29 | 1980-04-01 | Fujitsu Ltd | Method of fabricating hybrid integrated circuit |
-
1982
- 1982-07-16 JP JP10831082U patent/JPS5914394U/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4817742U (en) * | 1971-07-07 | 1973-02-28 | ||
| JPS536550B2 (en) * | 1974-03-22 | 1978-03-09 | ||
| JPS5546561A (en) * | 1978-09-29 | 1980-04-01 | Fujitsu Ltd | Method of fabricating hybrid integrated circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6159589U (en) * | 1984-09-21 | 1986-04-22 | ||
| JPH0356513U (en) * | 1989-10-04 | 1991-05-30 |
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