JPS62128342A - メモリアクセス制御方式 - Google Patents

メモリアクセス制御方式

Info

Publication number
JPS62128342A
JPS62128342A JP26886885A JP26886885A JPS62128342A JP S62128342 A JPS62128342 A JP S62128342A JP 26886885 A JP26886885 A JP 26886885A JP 26886885 A JP26886885 A JP 26886885A JP S62128342 A JPS62128342 A JP S62128342A
Authority
JP
Japan
Prior art keywords
bank
memory
block
address
memory access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP26886885A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0350301B2 (cs
Inventor
Mikio Ito
幹雄 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP26886885A priority Critical patent/JPS62128342A/ja
Publication of JPS62128342A publication Critical patent/JPS62128342A/ja
Publication of JPH0350301B2 publication Critical patent/JPH0350301B2/ja
Granted legal-status Critical Current

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  • Complex Calculations (AREA)
JP26886885A 1985-11-29 1985-11-29 メモリアクセス制御方式 Granted JPS62128342A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26886885A JPS62128342A (ja) 1985-11-29 1985-11-29 メモリアクセス制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26886885A JPS62128342A (ja) 1985-11-29 1985-11-29 メモリアクセス制御方式

Publications (2)

Publication Number Publication Date
JPS62128342A true JPS62128342A (ja) 1987-06-10
JPH0350301B2 JPH0350301B2 (cs) 1991-08-01

Family

ID=17464377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26886885A Granted JPS62128342A (ja) 1985-11-29 1985-11-29 メモリアクセス制御方式

Country Status (1)

Country Link
JP (1) JPS62128342A (cs)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078986A (en) * 1992-09-18 2000-06-20 Hitachi, Ltd. Processor system using synchronous dynamic memory
WO2002037284A3 (en) * 2000-11-03 2003-09-04 Broadcom Corp Pipelined multi-access memory apparatus and method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5264838A (en) * 1975-11-26 1977-05-28 Toshiba Corp Memory control system
JPS57209569A (en) * 1981-06-19 1982-12-22 Fujitsu Ltd Memory access device in vector processor system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5264838A (en) * 1975-11-26 1977-05-28 Toshiba Corp Memory control system
JPS57209569A (en) * 1981-06-19 1982-12-22 Fujitsu Ltd Memory access device in vector processor system

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6078986A (en) * 1992-09-18 2000-06-20 Hitachi, Ltd. Processor system using synchronous dynamic memory
US6260107B1 (en) 1992-09-18 2001-07-10 Hitachi, Ltd Processor system using synchronous dynamic memory
US6334166B1 (en) 1992-09-18 2001-12-25 Hitachi, Ltd. Processor system using synchronous dynamic memory
US6697908B2 (en) 1992-09-18 2004-02-24 Renesas Technology Corporation Processor system using synchronous dynamic memory
US7143230B2 (en) 1992-09-18 2006-11-28 Renesas Technology Corp. Processor system using synchronous dynamic memory
US7376783B2 (en) 1992-09-18 2008-05-20 Renesas Technology Corp. Processor system using synchronous dynamic memory
US7904641B2 (en) 1992-09-18 2011-03-08 Renesas Technology Corporation Processor system using synchronous dynamic memory
US8234441B2 (en) 1992-09-18 2012-07-31 Renesas Electronics Corporation Processor system using synchronous dynamic memory
WO2002037284A3 (en) * 2000-11-03 2003-09-04 Broadcom Corp Pipelined multi-access memory apparatus and method
US6976141B2 (en) 2000-11-03 2005-12-13 Broadcom Corporation Pipelined multi-access memory apparatus and method

Also Published As

Publication number Publication date
JPH0350301B2 (cs) 1991-08-01

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees