JPS6210009B2 - - Google Patents
Info
- Publication number
- JPS6210009B2 JPS6210009B2 JP54061991A JP6199179A JPS6210009B2 JP S6210009 B2 JPS6210009 B2 JP S6210009B2 JP 54061991 A JP54061991 A JP 54061991A JP 6199179 A JP6199179 A JP 6199179A JP S6210009 B2 JPS6210009 B2 JP S6210009B2
- Authority
- JP
- Japan
- Prior art keywords
- electron beam
- mark
- burr
- resist
- marks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electron Beam Exposure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6199179A JPS55153334A (en) | 1979-05-18 | 1979-05-18 | Manufacture of integrated element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6199179A JPS55153334A (en) | 1979-05-18 | 1979-05-18 | Manufacture of integrated element |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55153334A JPS55153334A (en) | 1980-11-29 |
JPS6210009B2 true JPS6210009B2 (enrdf_load_stackoverflow) | 1987-03-04 |
Family
ID=13187163
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6199179A Granted JPS55153334A (en) | 1979-05-18 | 1979-05-18 | Manufacture of integrated element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55153334A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0261407U (enrdf_load_stackoverflow) * | 1988-10-24 | 1990-05-08 | ||
JPH0670813U (ja) * | 1993-03-16 | 1994-10-04 | 鐘紡株式会社 | フィルターハウジング |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5917434B2 (ja) * | 1977-10-14 | 1984-04-21 | ヤマハ株式会社 | 電子楽器 |
-
1979
- 1979-05-18 JP JP6199179A patent/JPS55153334A/ja active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0261407U (enrdf_load_stackoverflow) * | 1988-10-24 | 1990-05-08 | ||
JPH0670813U (ja) * | 1993-03-16 | 1994-10-04 | 鐘紡株式会社 | フィルターハウジング |
Also Published As
Publication number | Publication date |
---|---|
JPS55153334A (en) | 1980-11-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5627110A (en) | Method for eliminating window mask process in the fabrication of a semiconductor wafer when chemical-mechanical polish planarization is used | |
JPH0210716A (ja) | アライメント・マークの形成方法及びアライテント・マークを有する半導体ウエハ | |
JPS6210009B2 (enrdf_load_stackoverflow) | ||
US4797334A (en) | Patterning optical and X-ray masks for integrated circuit fabrication | |
EP0230648B1 (en) | Method of forming an alignment mark | |
US5700381A (en) | Method for manufacturing thin film magnetic head | |
JP2003140366A (ja) | アライメントマーク作製方法 | |
JP2976986B2 (ja) | 位置合わせマークの形成方法 | |
JPS6154247B2 (enrdf_load_stackoverflow) | ||
JPS5856422A (ja) | パタ−ン形成法 | |
JPH07161684A (ja) | 半導体装置の製造方法 | |
JPH01196822A (ja) | 半導体集積回路装置 | |
JPH02276237A (ja) | 荷電ビームレジストの積層方法 | |
JPH08176799A (ja) | 選択成膜マスク及びその製造方法 | |
JPS6210010B2 (enrdf_load_stackoverflow) | ||
JPH0262939B2 (enrdf_load_stackoverflow) | ||
JPS63197336A (ja) | 位置合せマ−ク | |
JP3314832B2 (ja) | パターン形成方法 | |
JPH0722307A (ja) | アライメント方法および半導体装置の製造装置 | |
JPH07161721A (ja) | 厚膜レジストの平坦化方法 | |
JPS6210008B2 (enrdf_load_stackoverflow) | ||
JPH06250395A (ja) | 金属印刷刷版の製造方法 | |
JPH07111231A (ja) | 半導体装置およびその製造方法 | |
JPH06177027A (ja) | 電子ビーム描画方法及び半導体装置 | |
JPH06342851A (ja) | 半導体装置の製造方法 |