JPS6176994U - - Google Patents
Info
- Publication number
- JPS6176994U JPS6176994U JP16247284U JP16247284U JPS6176994U JP S6176994 U JPS6176994 U JP S6176994U JP 16247284 U JP16247284 U JP 16247284U JP 16247284 U JP16247284 U JP 16247284U JP S6176994 U JPS6176994 U JP S6176994U
- Authority
- JP
- Japan
- Prior art keywords
- conductive ink
- board
- wiring
- metal foil
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 4
- 239000011888 foil Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
第１図は本考案に係る両面配線基板の断面図、
第２図イ乃至トは同基板の製造方法を説明する図
、第３図及び第４図は従来基板を説明する図であ
る。
１は絶縁基板、２はスルホール、３は接着剤層
、４は金属箔、５，６は導電性インキ。
FIG. 1 is a sectional view of a double-sided wiring board according to the present invention,
FIGS. 2A to 2D are diagrams for explaining a method of manufacturing the same substrate, and FIGS. 3 and 4 are diagrams for explaining a conventional substrate. 1 is an insulating substrate, 2 is a through hole, 3 is an adhesive layer, 4 is a metal foil, and 5 and 6 are conductive ink.
Claims (1)
箔の上に導電性インキにて回路パターンを形成し
、エツチング処理にて得られた金属箔配線回路を
備え、他方の面には、導電性インキによる印刷配
線回路を備えるとともに、該基板のスルホールに
導電性インキを埋め込んで基板両面の配線回路間
を電気的に接続してなることを特徴とする両面配
線基板。 One side of the insulating substrate has a metal foil wiring circuit formed by forming a circuit pattern with conductive ink on laminated metal foil and etching it, and the other side has a conductive ink pattern. 1. A double-sided wiring board comprising a printed wiring circuit according to the invention, and electrically connecting the wiring circuits on both sides of the board by embedding conductive ink into the through holes of the board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16247284U JPH0229739Y2 (en) | 1984-10-26 | 1984-10-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16247284U JPH0229739Y2 (en) | 1984-10-26 | 1984-10-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6176994U true JPS6176994U (en) | 1986-05-23 |
| JPH0229739Y2 JPH0229739Y2 (en) | 1990-08-09 |
Family
ID=30720351
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16247284U Expired JPH0229739Y2 (en) | 1984-10-26 | 1984-10-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0229739Y2 (en) |
-
1984
- 1984-10-26 JP JP16247284U patent/JPH0229739Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0229739Y2 (en) | 1990-08-09 |
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